ZeroSuppressionLinkBased.h

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// Copyright 2019-2020 CERN and copyright holders of ALICE O2.
// See https://alice-o2.web.cern.ch/copyright for details of the copyright holders.
// All rights not expressly granted are reserved.
//
// This software is distributed under the terms of the GNU General Public
// License v3 (GPL Version 3), copied verbatim in the file "COPYING".
//
// In applying this license CERN does not waive the privileges and immunities
// granted to it by virtue of its status as an Intergovernmental Organization
// or submit itself to any jurisdiction.
 
 
#ifndef ALICEO2_DATAFORMATSTPC_ZeroSuppressionLinkBased_H
#define ALICEO2_DATAFORMATSTPC_ZeroSuppressionLinkBased_H
 
#include "GPUCommonDef.h"
 
#ifndef GPUCA_GPUCODE
#include <cstdint>
#include <bitset>
#endif
 
namespace o2
{
namespace tpc
{
namespace zerosupp_link_based
{
 
static constexpr uint32_t DataWordSizeBits = 128;                   
static constexpr uint32_t DataWordSizeBytes = DataWordSizeBits / 8; 
static constexpr uint32_t ChannelPerTBHeader = 80;
 
struct CommonHeader {
  static constexpr uint32_t MagicWordLinkZS = 0xFC;
  static constexpr uint32_t MagicWordLinkZSMetaHeader = 0xFD;
  static constexpr uint32_t MagicWordTrigger = 0xAA;
  static constexpr uint32_t MagicWordTriggerV2 = 0xAB;
 
  union {
    uint64_t word0 = 0;             
    struct {                        
      uint64_t bitMaskLow : 64;     
    };                              
  };                                
  union {                           
    uint64_t word1 = 0;             
    struct {                        
      uint64_t bitMaskHigh : 16;    
      uint32_t bunchCrossing : 12;  
      uint32_t numWordsPayload : 4; 
      uint32_t syncOffsetBC : 8;    
      uint32_t fecInPartition : 8;  
      uint32_t CMC : 8;             
      uint32_t magicWord : 8;       
    };
  };
 
  bool hasCorrectMagicWord() const { return (magicWord == MagicWordLinkZS) || (magicWord == MagicWordLinkZSMetaHeader) || (magicWord == MagicWordTrigger) || (magicWord == MagicWordTriggerV2); }
  bool isLinkZS() const { return (magicWord == MagicWordLinkZS); }
  bool isMetaHeader() const { return (magicWord == MagicWordLinkZSMetaHeader); }
  bool isTriggerInfo() const { return (magicWord == MagicWordTrigger); }
  bool isTriggerInfoV2() const { return (magicWord == MagicWordTriggerV2); }
};
 
// GPU Code only requires header definition
#ifndef GPUCA_GPUCODE
 
struct Header final : public CommonHeader {
 
  std::bitset<80> getChannelBits() const
  {
    return std::bitset<80>((std::bitset<80>(bitMaskHigh) << 64) | std::bitset<80>(bitMaskLow));
  }
 
  bool isFillWord() const { return ((word0 == 0xffffffffffffffff) && (word1 == 0xffffffffffffffff)); }
};
 
template <uint32_t DataBitSizeT = 12, uint32_t SignificantBitsT = 2>
struct Data {
  static constexpr uint32_t ChannelsPerWord = DataWordSizeBits / DataBitSizeT; 
  static constexpr uint32_t ChannelsPerHalfWord = ChannelsPerWord / 2;         
  static constexpr uint32_t DataBitSize = DataBitSizeT;                        
  static constexpr uint32_t SignificantBits = SignificantBitsT;                
  static constexpr uint64_t BitMask = ((uint64_t(1) << DataBitSize) - 1);      
  static constexpr float FloatConversion = 1.f / float(1 << SignificantBits);  
 
  uint64_t adcValues[2]{}; 
 
  void setADCValue(uint32_t pos, uint64_t value)
  {
    const uint32_t word = pos / ChannelsPerHalfWord;
    const uint32_t posInWord = pos % ChannelsPerHalfWord;
 
    const uint64_t set = (value & BitMask) << (posInWord * DataBitSize);
    const uint64_t mask = (0xFFFFFFFFFFFFFFFF ^ (BitMask << (posInWord * DataBitSize)));
 
    adcValues[word] &= mask;
    adcValues[word] |= set;
  }
 
  void setADCValueFloat(uint32_t pos, float value)
  {
    setADCValue(pos, uint64_t((value + 0.5f * FloatConversion) / FloatConversion));
  }
 
  uint32_t getADCValue(uint32_t pos) const
  {
    const uint32_t word = pos / ChannelsPerHalfWord;
    const uint32_t posInWord = pos % ChannelsPerHalfWord;
 
    return (adcValues[word] >> (posInWord * DataBitSize)) & BitMask;
  }
 
  float getADCValueFloat(uint32_t pos) const
  {
    return float(getADCValue(pos)) * FloatConversion;
  }
 
  void reset()
  {
    adcValues[0] = 0;
    adcValues[1] = 0;
  }
};
 
template <uint32_t DataBitSizeT, uint32_t SignificantBitsT, bool HasHeaderT>
struct ContainerT;
 
template <uint32_t DataBitSizeT, uint32_t SignificantBitsT>
struct ContainerT<DataBitSizeT, SignificantBitsT, true> {
  Header header;                                
  Data<DataBitSizeT, SignificantBitsT> data[0]; 
 
  uint32_t getBunchCrossing() const { return header.bunchCrossing; }
 
  uint32_t getDataWords() const { return header.numWordsPayload; }
 
  uint32_t getTotalWords() const { return header.numWordsPayload + 1; }
 
  std::bitset<80> getChannelBits() const { return header.getChannelBits(); }
};
 
template <uint32_t DataBitSizeT, uint32_t SignificantBitsT>
struct ContainerT<DataBitSizeT, SignificantBitsT, false> {
  Data<DataBitSizeT, SignificantBitsT> data[0]; 
 
  uint32_t getBunchCrossing() const { return 0; }
 
  uint32_t getDataWords() const { return 7; }
 
  uint32_t getTotalWords() const { return 7; }
 
  std::bitset<80> getChannelBits() const { return std::bitset<80>().set(); }
};
 
template <uint32_t DataBitSizeT = 12, uint32_t SignificantBitsT = 2, bool HasHeaderT = true>
struct Container {
  static constexpr uint32_t ChannelsPerWord = DataWordSizeBits / DataBitSizeT; 
 
  ContainerT<DataBitSizeT, SignificantBitsT, HasHeaderT> cont; 
 
  uint32_t getADCValue(uint32_t word) { return cont.data[word / ChannelsPerWord].getADCValue(word % ChannelsPerWord); }
 
  float getADCValueFloat(uint32_t word) { return cont.data[word / ChannelsPerWord].getADCValueFloat(word % ChannelsPerWord); }
 
  void setADCValue(uint32_t word, uint64_t value) { cont.data[word / ChannelsPerWord].setADCValue(word % ChannelsPerWord, value); }
 
  void setADCValueFloat(uint32_t word, float value) { cont.data[word / ChannelsPerWord].setADCValueFloat(word % ChannelsPerWord, value); }
 
  void reset()
  {
    for (int i = 0; i < cont.getDataWords(); ++i) {
      cont.data[i].reset();
    }
  }
 
  uint32_t getBunchCrossing() const { return cont.getBunchCrossing(); }
  uint32_t getDataWords() const { return cont.getDataWords(); }
  uint32_t getTotalWords() const { return cont.getTotalWords(); }
  std::bitset<80> getChannelBits() const { return cont.getChannelBits(); }
 
  size_t getTotalSizeBytes() const { return getTotalWords() * DataWordSizeBytes; }
 
  Container* next() const
  {
    return (Container*)((const char*)this + getTotalWords() * DataWordSizeBytes);
  }
 
}; // namespace zerosupp_link_based
 
using ContainerZS = Container<>;
using ContainerDecoded = Container<10, 0, false>;
 
struct TriggerInfo {
  union {
    uint64_t word0 = 0;              
    struct {                         
      uint16_t bunchCrossing : 12;   
      uint64_t orbit : 32;           
      uint32_t triggerTypeLow : 20;  
    };                               
  };                                 
  union {                            
    uint64_t word1 = 0;              
    struct {                         
      uint32_t triggerTypeHigh : 12; 
      uint64_t empty : 50;           
    };
  };
 
  uint32_t getOrbit() const { return (uint32_t)orbit; }
  uint32_t getTriggerType() const { return (triggerTypeHigh << 20) + triggerTypeLow; }
};
 
struct TriggerInfoV2 {
  union {
    uint64_t word0 = 0;             
    struct {                        
      uint32_t triggerType;         
      uint32_t orbit;               
    };                              
  };                                
  union {                           
    uint64_t word1 = 0;             
    struct {                        
      uint32_t bunchCrossing : 12;  
      uint32_t empty1_0 : 16;       
      uint32_t numWordsPayload : 4; 
      uint32_t empty1_1 : 24;       
      uint32_t magicWord : 8;       
    };
  };
};
 
struct TriggerContainer {
  CommonHeader header;
  TriggerInfo triggerInfo;
 
  uint32_t getTriggerType() const { return triggerInfo.getTriggerType(); }
};
 
struct TriggerWord {
  static constexpr uint16_t HasTrigger = 0x8;
  static constexpr uint16_t LaserTriggerMask = 0x4;
  static constexpr uint16_t PulserTriggerMask = 0x2;
  static constexpr uint16_t PhysicsTriggerMask = 0x1;
 
  union {
    uint16_t word = 0;
    struct {
      uint16_t bunchCrossing : 12;
      uint16_t triggerType : 4;
    };
  };
 
  bool hasTrigger() const { return triggerType & HasTrigger; }
  bool hasLaserTrigger() const { return triggerType & LaserTriggerMask; }
  bool hasPulserTrigger() const { return triggerType & PulserTriggerMask; }
  bool hasPhysicsTrigger() const { return triggerType & PhysicsTriggerMask; }
};
 
struct TriggerInfoV3 {
  uint64_t word0 = 0;
  uint64_t word1 = 0;
 
  bool hasTrigger() const { return word0 != 0x0; }
  uint16_t getFirstBC() const { return word0 & 0xFFF; }
};
#endif // !defined(GPUCA_GPUCODE)
 
} // namespace zerosupp_link_based
} // namespace tpc
} // namespace o2
 
#endif