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Specs.h
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1// Copyright 2019-2020 CERN and copyright holders of ALICE O2.
2// See https://alice-o2.web.cern.ch/copyright for details of the copyright holders.
3// All rights not expressly granted are reserved.
4//
5// This software is distributed under the terms of the GNU General Public
6// License v3 (GPL Version 3), copied verbatim in the file "COPYING".
7//
8// In applying this license CERN does not waive the privileges and immunities
9// granted to it by virtue of its status as an Intergovernmental Organization
10// or submit itself to any jurisdiction.
11
14
15#ifndef O2_ALICE_TRK_SPECS
16#define O2_ALICE_TRK_SPECS
17
18#include <array>
19#include <math.h>
20// This is a temporary version with the specs for the ALICE3 TRK
21// This files defines the design specifications of the chips for VD, ML, OT.
22// Each TGeoShape has the following properties
23// length: dimension in z-axis
24// width: dimension in xy-axes
25// color: for visualisation
27{
28// Default unit of TGeo = cm
29constexpr double cm{1};
30constexpr double mu{1e-4};
31constexpr double mm{1e-1};
32
33namespace VD // TODO: add a primitive segmentation with more granularity wrt 1/4 layer = 1 chip
34{
35namespace silicon
36{
37constexpr double thickness{30 * mu}; // thickness of the silicon (should be 10 um epitaxial layer + 20 um substrate)?
38} // namespace silicon
39namespace metalstack
40{
41constexpr double thickness{0 * mu}; // thickness of the copper metal stack - for the moment it is not implemented
42} // namespace metalstack
43namespace petal
44{
45constexpr int nLayers{3}; // number of layers in each VD petal
46constexpr int nDisks{6}; // number of disks in each VD petal
47namespace layer
48{
49constexpr double pitchX{10 * mu}; // pitch of the row
50constexpr double pitchZ{10 * mu}; // pitch of the column
51constexpr double totalThickness{silicon::thickness + metalstack::thickness}; // total thickness of the chip
52constexpr std::array<double, nLayers> radii{0.5 * cm, 1.2 * cm, 2.5 * cm}; // radius of layer in cm
53constexpr std::array<double, nLayers> width{radii[0] * 2 * M_PI / 4, radii[1] * 2 * M_PI / 4, radii[2] * 2 * M_PI / 4}; // width of the quarter of layer in cm
54constexpr double length{50 * cm}; // length of the layer
55constexpr int nCols{static_cast<int>(length / pitchZ)}; // number of columns in the chip
56constexpr std::array<int, nLayers> nRows{static_cast<int>(width[0] / pitchX), static_cast<int>(width[1] / pitchX), static_cast<int>(width[2] / pitchX)}; // number of rows in the chip. For the moment is different for each layer since a siner segmentation in repetitive units is stil to be implemented
57
58} // namespace layer
59namespace disk
60{
61constexpr double radiusIn{0.5 * cm};
62constexpr double radiusOut{2.5 * cm};
63} // namespace disk
64} // namespace petal
65} // namespace VD
66
67namespace moduleMLOT
68{
69namespace silicon
70{
71constexpr double thickness{100 * mu}; // thickness of the silicon (should be 10 um epitaxial layer + 90 um substrate)?
72} // namespace silicon
73namespace metalstack
74{
75constexpr double thickness{0 * mu}; // thickness of the copper metal stack - for the moment it is not implemented
76} // namespace metalstack
77namespace chip
78{
79constexpr double width{25 * mm}; // width of the chip
80constexpr double length{32 * mm}; // length of the chip
81constexpr double pitchX{50 * mu}; // pitch of the row
82constexpr double pitchZ{50 * mu}; // pitch of the column
83constexpr int nRows{static_cast<int>(width / pitchX)}; // number of columns in the chip
84constexpr int nCols{static_cast<int>(length / pitchZ)}; // number of rows in the chip
85constexpr double totalThickness{silicon::thickness + metalstack::thickness}; // total thickness of the chip
87static constexpr float passiveEdgeReadOut{1.5 * mm}; // width of the readout edge
88} // namespace chip
89namespace gaps
90{
91constexpr double interChips{50 * mu}; // gap between the chips
92constexpr double outerEdgeLongSide{1 * mm}; // gap between the chips and the outer edges (long side)
93constexpr double outerEdgeShortSide{0.1 * mm}; // gap between the chips and the outer edges (short side)
94} // namespace gaps
95constexpr double width{chip::width * 2 + gaps::interChips + 2 * gaps::outerEdgeLongSide}; // width of the module
96constexpr double length{chip::length * 4 + 3 * gaps::interChips + 2 * gaps::outerEdgeShortSide}; // length of the module
97constexpr int nRows{static_cast<int>(width / chip::pitchX)}; // number of columns in the module
98constexpr int nCols{static_cast<int>(length / chip::pitchZ)}; // number of rows in the module
99} // namespace moduleMLOT
100
101namespace ML
102{
103constexpr double width{constants::moduleMLOT::width * 1}; // width of the stave
104// constexpr double length{constants::moduleMLOT::length * 10}; // length of the stave
105constexpr double length{124 * cm}; // length of the stave, hardcoded to fit the implemented geometry
106constexpr int nRows{static_cast<int>(width / constants::moduleMLOT::chip::pitchX)}; // number of rows in the stave
107constexpr int nCols{static_cast<int>(length / constants::moduleMLOT::chip::pitchZ)}; // number of columns in the stave
108} // namespace ML
109
110namespace OT
111{
112namespace halfstave
113{
114constexpr double width{moduleMLOT::width * 1}; // width of the half stave
115// constexpr double length{moduleMLOT::length * 20}; // length of the halfstave
116constexpr double length{258 * cm}; // length of the halfstave, hardcoded to fit the implemented geometry
117constexpr int nRows{static_cast<int>(width / moduleMLOT::chip::pitchX)}; // number of rows in the halfstave
118constexpr int nCols{static_cast<int>(length / moduleMLOT::chip::pitchZ)}; // number of columns in the halfstave
119} // namespace halfstave
120constexpr double width{halfstave::width * 2}; // width of the stave
121constexpr double length{halfstave::length}; // length of the stave
122constexpr int nRows{static_cast<int>(width / moduleMLOT::chip::pitchX)}; // number of rows in the stave
123constexpr int nCols{static_cast<int>(length / moduleMLOT::chip::pitchZ)}; // number of columns in the stave
124} // namespace OT
125
126namespace apts
127{
128constexpr double pitchX{15.0 * mu};
129constexpr double pitchZ{15.0 * mu};
130constexpr double responseYShift{15.5 * mu};
131constexpr double thickness{45 * mu};
132} // namespace apts
133
134} // namespace o2::trk::constants
135
136#endif
GLint GLsizei width
Definition glcorearb.h:270
GLuint GLsizei GLsizei * length
Definition glcorearb.h:790
GLenum GLuint GLint GLint layer
Definition glcorearb.h:1310
constexpr int nRows
Definition Specs.h:106
constexpr int nCols
Definition Specs.h:107
constexpr int nRows
Definition Specs.h:122
constexpr int nCols
Definition Specs.h:123
constexpr double thickness
Definition Specs.h:41
constexpr std::array< double, nLayers > radii
Definition Specs.h:52
constexpr double totalThickness
Definition Specs.h:51
constexpr std::array< int, nLayers > nRows
Definition Specs.h:56
constexpr int nLayers
Definition Specs.h:45
constexpr double thickness
Definition Specs.h:37
constexpr double pitchZ
Definition Specs.h:129
constexpr double pitchX
Definition Specs.h:128
constexpr double thickness
Definition Specs.h:131
constexpr double responseYShift
Definition Specs.h:130
constexpr double totalThickness
Definition Specs.h:85
constexpr double outerEdgeLongSide
Definition Specs.h:92
constexpr double outerEdgeShortSide
Definition Specs.h:93
constexpr double width
Definition Specs.h:95
constexpr double mm
Definition Specs.h:31
constexpr double mu
Definition Specs.h:30
constexpr double cm
Definition Specs.h:29