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GPUChainTrackingClusterizer.cxx
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1// Copyright 2019-2020 CERN and copyright holders of ALICE O2.
2// See https://alice-o2.web.cern.ch/copyright for details of the copyright holders.
3// All rights not expressly granted are reserved.
4//
5// This software is distributed under the terms of the GNU General Public
6// License v3 (GPL Version 3), copied verbatim in the file "COPYING".
7//
8// In applying this license CERN does not waive the privileges and immunities
9// granted to it by virtue of its status as an Intergovernmental Organization
10// or submit itself to any jurisdiction.
11
14
15#include "GPUChainTracking.h"
18#include "GPULogging.h"
19#include "GPUO2DataTypes.h"
22#include "GPUNewCalibValues.h"
23#include "GPUConstantMem.h"
24#include "CfChargePos.h"
25#include "CfArray2D.h"
26#include "GPUGeneralKernels.h"
27#include "GPUDefParametersRuntime.h"
30#include "GPUTPCCFDecodeZS.h"
32#include "GPUTPCCFPeakFinder.h"
35#include "GPUTPCCFClusterizer.h"
36#include "GPUTPCCFGather.h"
38#include "GPUTriggerOutputs.h"
39#include "GPUHostDataTypes.h"
45#include "TPCBase/RDHUtils.h"
46
47#ifdef GPUCA_HAS_ONNX
50#endif
51
52#ifdef GPUCA_O2_LIB
54#endif
55
56#include "utils/VcShim.h"
57#include "utils/strtag.h"
58#include <fstream>
59
60using namespace o2::gpu;
61using namespace o2::tpc;
62using namespace o2::tpc::constants;
63using namespace o2::dataformats;
64
65#ifdef GPUCA_TPC_GEOMETRY_O2
66std::pair<uint32_t, uint32_t> GPUChainTracking::TPCClusterizerDecodeZSCountUpdate(uint32_t iSector, const CfFragment& fragment)
67{
69 GPUTPCClusterFinder& clusterer = processors()->tpcClusterer[iSector];
71 uint32_t digits = 0;
72 uint32_t pages = 0;
73 for (uint16_t j = 0; j < GPUTrackingInOutZS::NENDPOINTS; j++) {
74 clusterer.mMinMaxCN[j] = mCFContext->fragmentData[fragment.index].minMaxCN[iSector][j];
75 if (doGPU) {
76 uint16_t posInEndpoint = 0;
77 uint16_t pagesEndpoint = 0;
78 for (uint32_t k = clusterer.mMinMaxCN[j].zsPtrFirst; k < clusterer.mMinMaxCN[j].zsPtrLast; k++) {
79 const uint32_t pageFirst = (k == clusterer.mMinMaxCN[j].zsPtrFirst) ? clusterer.mMinMaxCN[j].zsPageFirst : 0;
80 const uint32_t pageLast = (k + 1 == clusterer.mMinMaxCN[j].zsPtrLast) ? clusterer.mMinMaxCN[j].zsPageLast : mIOPtrs.tpcZS->sector[iSector].nZSPtr[j][k];
81 for (uint32_t l = pageFirst; l < pageLast; l++) {
82 uint16_t pageDigits = mCFContext->fragmentData[fragment.index].pageDigits[iSector][j][posInEndpoint++];
83 if (pageDigits) {
84 *(o++) = GPUTPCClusterFinder::ZSOffset{digits, j, pagesEndpoint};
85 digits += pageDigits;
86 }
87 pagesEndpoint++;
88 }
89 }
90 if (pagesEndpoint != mCFContext->fragmentData[fragment.index].pageDigits[iSector][j].size()) {
91 if (GetProcessingSettings().ignoreNonFatalGPUErrors) {
92 GPUError("TPC raw page count mismatch in TPCClusterizerDecodeZSCountUpdate: expected %d / buffered %lu", pagesEndpoint, mCFContext->fragmentData[fragment.index].pageDigits[iSector][j].size());
93 return {0, 0};
94 } else {
95 GPUFatal("TPC raw page count mismatch in TPCClusterizerDecodeZSCountUpdate: expected %d / buffered %lu", pagesEndpoint, mCFContext->fragmentData[fragment.index].pageDigits[iSector][j].size());
96 }
97 }
98 } else {
100 digits += mCFContext->fragmentData[fragment.index].nDigits[iSector][j];
101 pages += mCFContext->fragmentData[fragment.index].nPages[iSector][j];
102 }
103 }
104 if (doGPU) {
105 pages = o - processors()->tpcClusterer[iSector].mPzsOffsets;
106 }
107 if (GetProcessingSettings().clusterizerZSSanityCheck && mCFContext->zsVersion >= ZSVersion::ZSVersionDenseLinkBased) {
108 TPCClusterizerEnsureZSOffsets(iSector, fragment);
109 }
110 return {digits, pages};
111}
112
113void GPUChainTracking::TPCClusterizerEnsureZSOffsets(uint32_t iSector, const CfFragment& fragment)
114{
115 GPUTPCClusterFinder& clusterer = processors()->tpcClusterer[iSector];
116 uint32_t nAdcs = 0;
118 const auto& data = mCFContext->fragmentData[fragment.index];
119 uint32_t pagesEndpoint = 0;
120 const uint32_t nAdcsExpected = data.nDigits[iSector][endpoint];
121 const uint32_t nPagesExpected = data.nPages[iSector][endpoint];
122
123 uint32_t nAdcDecoded = 0;
124 const auto& zs = mIOPtrs.tpcZS->sector[iSector];
125 for (uint32_t i = data.minMaxCN[iSector][endpoint].zsPtrFirst; i < data.minMaxCN[iSector][endpoint].zsPtrLast; i++) {
126 const uint32_t pageFirst = (i == data.minMaxCN[iSector][endpoint].zsPtrFirst) ? data.minMaxCN[iSector][endpoint].zsPageFirst : 0;
127 const uint32_t pageLast = (i + 1 == data.minMaxCN[iSector][endpoint].zsPtrLast) ? data.minMaxCN[iSector][endpoint].zsPageLast : zs.nZSPtr[endpoint][i];
128 for (uint32_t j = pageFirst; j < pageLast; j++) {
129 const uint8_t* page = static_cast<const uint8_t*>(zs.zsPtr[endpoint][i]) + j * TPCZSHDR::TPC_ZS_PAGE_SIZE;
130 const header::RAWDataHeader* rawDataHeader = reinterpret_cast<const header::RAWDataHeader*>(page);
131 const TPCZSHDRV2* decHdr = reinterpret_cast<const TPCZSHDRV2*>(page + raw::RDHUtils::getMemorySize(*rawDataHeader) - sizeof(TPCZSHDRV2));
132 const uint16_t nSamplesInPage = decHdr->nADCsamples;
133
134 nAdcDecoded += nSamplesInPage;
135 pagesEndpoint++;
136 }
137 }
138
139 if (pagesEndpoint != nPagesExpected) {
140 GPUFatal("Sector %d, Endpoint %d, Fragment %d: TPC raw page count mismatch: expected %d / buffered %u", iSector, endpoint, fragment.index, pagesEndpoint, nPagesExpected);
141 }
142
143 if (nAdcDecoded != nAdcsExpected) {
144 GPUFatal("Sector %d, Endpoint %d, Fragment %d: TPC ADC count mismatch: expected %u, buffered %u", iSector, endpoint, fragment.index, nAdcsExpected, nAdcDecoded);
145 }
146
147 if (nAdcs != clusterer.mPzsOffsets[endpoint].offset) {
148 GPUFatal("Sector %d, Endpoint %d, Fragment %d: TPC ADC offset mismatch: expected %u, buffered %u", iSector, endpoint, fragment.index, nAdcs, clusterer.mPzsOffsets[endpoint].offset);
149 }
150
151 nAdcs += nAdcsExpected;
152 }
153}
154
155namespace
156{
157struct TPCCFDecodeScanTmp {
158 int32_t zsPtrFirst, zsPageFirst, zsPtrLast, zsPageLast, hasData, pageCounter;
159};
160} // namespace
161
162std::pair<uint32_t, uint32_t> GPUChainTracking::TPCClusterizerDecodeZSCount(uint32_t iSector, const CfFragment& fragment)
163{
164 mRec->getGeneralStepTimer(GeneralStep::Prepare).Start();
165 uint32_t nDigits = 0;
166 uint32_t nPages = 0;
167 uint32_t endpointAdcSamples[GPUTrackingInOutZS::NENDPOINTS];
168 memset(endpointAdcSamples, 0, sizeof(endpointAdcSamples));
170 int32_t firstHBF = (mIOPtrs.settingsTF && mIOPtrs.settingsTF->hasTfStartOrbit) ? mIOPtrs.settingsTF->tfStartOrbit : ((mIOPtrs.tpcZS->sector[iSector].count[0] && mIOPtrs.tpcZS->sector[iSector].nZSPtr[0][0]) ? o2::raw::RDHUtils::getHeartBeatOrbit(*(const o2::header::RAWDataHeader*)mIOPtrs.tpcZS->sector[iSector].zsPtr[0][0]) : 0);
171
172 for (uint16_t j = 0; j < GPUTrackingInOutZS::NENDPOINTS; j++) {
173
174 if (GetProcessingSettings().prefetchTPCpageScan >= 3 && j < GPUTrackingInOutZS::NENDPOINTS - 1) {
175 for (uint32_t k = 0; k < mIOPtrs.tpcZS->sector[iSector].count[j + 1]; k++) {
176 for (uint32_t l = 0; l < mIOPtrs.tpcZS->sector[iSector].nZSPtr[j + 1][k]; l++) {
177 Vc::Common::prefetchMid(((const uint8_t*)mIOPtrs.tpcZS->sector[iSector].zsPtr[j + 1][k]) + l * TPCZSHDR::TPC_ZS_PAGE_SIZE);
178 Vc::Common::prefetchMid(((const uint8_t*)mIOPtrs.tpcZS->sector[iSector].zsPtr[j + 1][k]) + l * TPCZSHDR::TPC_ZS_PAGE_SIZE + sizeof(o2::header::RAWDataHeader));
179 }
180 }
181 }
182
183 std::vector<std::pair<CfFragment, TPCCFDecodeScanTmp>> fragments;
184 fragments.reserve(mCFContext->nFragments);
185 fragments.emplace_back(std::pair<CfFragment, TPCCFDecodeScanTmp>{fragment, {0, 0, 0, 0, 0, -1}});
186 for (uint32_t i = 1; i < mCFContext->nFragments; i++) {
187 fragments.emplace_back(std::pair<CfFragment, TPCCFDecodeScanTmp>{fragments.back().first.next(), {0, 0, 0, 0, 0, -1}});
188 }
189 std::vector<bool> fragmentExtends(mCFContext->nFragments, false);
190
191 uint32_t firstPossibleFragment = 0;
192 uint32_t pageCounter = 0;
193 uint32_t emptyPages = 0;
194 for (uint32_t k = 0; k < mIOPtrs.tpcZS->sector[iSector].count[j]; k++) {
195 if (GetProcessingSettings().tpcSingleSector != -1 && GetProcessingSettings().tpcSingleSector != (int32_t)iSector) {
196 break;
197 }
198 nPages += mIOPtrs.tpcZS->sector[iSector].nZSPtr[j][k];
199 for (uint32_t l = 0; l < mIOPtrs.tpcZS->sector[iSector].nZSPtr[j][k]; l++) {
200
201 if (GetProcessingSettings().prefetchTPCpageScan >= 2 && l + 1 < mIOPtrs.tpcZS->sector[iSector].nZSPtr[j][k]) {
202 Vc::Common::prefetchForOneRead(((const uint8_t*)mIOPtrs.tpcZS->sector[iSector].zsPtr[j][k]) + (l + 1) * TPCZSHDR::TPC_ZS_PAGE_SIZE);
203 Vc::Common::prefetchForOneRead(((const uint8_t*)mIOPtrs.tpcZS->sector[iSector].zsPtr[j][k]) + (l + 1) * TPCZSHDR::TPC_ZS_PAGE_SIZE + sizeof(o2::header::RAWDataHeader));
204 }
205
206 const uint8_t* const page = ((const uint8_t*)mIOPtrs.tpcZS->sector[iSector].zsPtr[j][k]) + l * TPCZSHDR::TPC_ZS_PAGE_SIZE;
208 if (o2::raw::RDHUtils::getMemorySize(*rdh) == sizeof(o2::header::RAWDataHeader)) {
209 emptyPages++;
210 continue;
211 }
212 pageCounter++;
213 const TPCZSHDR* const hdr = (const TPCZSHDR*)(rdh_utils::getLink(o2::raw::RDHUtils::getFEEID(*rdh)) == rdh_utils::DLBZSLinkID ? (page + o2::raw::RDHUtils::getMemorySize(*rdh) - sizeof(TPCZSHDRV2)) : (page + sizeof(o2::header::RAWDataHeader)));
214 if (mCFContext->zsVersion == -1) {
215 mCFContext->zsVersion = hdr->version;
216 if (GetProcessingSettings().param.tpcTriggerHandling && mCFContext->zsVersion < ZSVersion::ZSVersionDenseLinkBased) { // TODO: Move tpcTriggerHandling to recoSteps bitmask
217 static bool errorShown = false;
218 if (errorShown == false) {
219 GPUAlarm("Trigger handling only possible with TPC Dense Link Based data, received version %d, disabling", mCFContext->zsVersion);
220 }
221 errorShown = true;
222 }
223 } else if (mCFContext->zsVersion != (int32_t)hdr->version) {
224 GPUError("Received TPC ZS 8kb page of mixed versions, expected %d, received %d (linkid %d, feeCRU %d, feeEndpoint %d, feelinkid %d)", mCFContext->zsVersion, (int32_t)hdr->version, (int32_t)o2::raw::RDHUtils::getLinkID(*rdh), (int32_t)rdh_utils::getCRU(*rdh), (int32_t)rdh_utils::getEndPoint(*rdh), (int32_t)rdh_utils::getLink(*rdh));
225 constexpr size_t bufferSize = 3 * std::max(sizeof(*rdh), sizeof(*hdr)) + 1;
226 char dumpBuffer[bufferSize];
227 for (size_t i = 0; i < sizeof(*rdh); i++) {
228 // "%02X " guaranteed to be 3 chars + ending 0.
229 snprintf(dumpBuffer + 3 * i, 4, "%02X ", (int32_t)((uint8_t*)rdh)[i]);
230 }
231 GPUAlarm("RDH of page: %s", dumpBuffer);
232 for (size_t i = 0; i < sizeof(*hdr); i++) {
233 // "%02X " guaranteed to be 3 chars + ending 0.
234 snprintf(dumpBuffer + 3 * i, 4, "%02X ", (int32_t)((uint8_t*)hdr)[i]);
235 }
236 GPUAlarm("Metainfo of page: %s", dumpBuffer);
237 if (GetProcessingSettings().ignoreNonFatalGPUErrors) {
238 mCFContext->abandonTimeframe = true;
239 return {0, 0};
240 } else {
241 GPUFatal("Cannot process with invalid TPC ZS data, exiting");
242 }
243 }
244 if (GetProcessingSettings().param.tpcTriggerHandling) {
245 const TPCZSHDRV2* const hdr2 = (const TPCZSHDRV2*)hdr;
246 if (hdr2->flags & TPCZSHDRV2::ZSFlags::TriggerWordPresent) {
247 const char* triggerWord = (const char*)hdr - TPCZSHDRV2::TRIGGER_WORD_SIZE;
249 memcpy((void*)&tmp.triggerWord, triggerWord, TPCZSHDRV2::TRIGGER_WORD_SIZE);
250 tmp.orbit = o2::raw::RDHUtils::getHeartBeatOrbit(*rdh);
251 if (tmp.triggerWord.isValid(0)) {
252 mTriggerBuffer->triggers.emplace(tmp);
253 }
254 }
255 }
256 nDigits += hdr->nADCsamples;
257 endpointAdcSamples[j] += hdr->nADCsamples;
258 uint32_t timeBin = (hdr->timeOffset + (o2::raw::RDHUtils::getHeartBeatOrbit(*rdh) - firstHBF) * o2::constants::lhc::LHCMaxBunches) / LHCBCPERTIMEBIN;
259 uint32_t maxTimeBin = timeBin + hdr->nTimeBinSpan;
260 if (mCFContext->zsVersion >= ZSVersion::ZSVersionDenseLinkBased) {
261 const TPCZSHDRV2* const hdr2 = (const TPCZSHDRV2*)hdr;
262 if (hdr2->flags & TPCZSHDRV2::ZSFlags::nTimeBinSpanBit8) {
263 maxTimeBin += 256;
264 }
265 }
266 if (maxTimeBin > mCFContext->tpcMaxTimeBin) {
267 mCFContext->tpcMaxTimeBin = maxTimeBin;
268 }
269 bool extendsInNextPage = false;
270 if (mCFContext->zsVersion >= ZSVersion::ZSVersionDenseLinkBased) {
271 if (l + 1 < mIOPtrs.tpcZS->sector[iSector].nZSPtr[j][k] && o2::raw::RDHUtils::getMemorySize(*rdh) == TPCZSHDR::TPC_ZS_PAGE_SIZE) {
273 extendsInNextPage = o2::raw::RDHUtils::getHeartBeatOrbit(*nextrdh) == o2::raw::RDHUtils::getHeartBeatOrbit(*rdh) && o2::raw::RDHUtils::getMemorySize(*nextrdh) > sizeof(o2::header::RAWDataHeader);
274 }
275 }
276 while (firstPossibleFragment && (uint32_t)fragments[firstPossibleFragment - 1].first.last() > timeBin) {
277 firstPossibleFragment--;
278 }
279 auto handleExtends = [&](uint32_t ff) {
280 if (fragmentExtends[ff]) {
281 if (doGPU) {
282 // Only add extended page on GPU. On CPU the pages are in consecutive memory anyway.
283 // Not adding the page prevents an issue where a page is decoded twice on CPU, when only the extend should be decoded.
284 fragments[ff].second.zsPageLast++;
285 mCFContext->fragmentData[ff].nPages[iSector][j]++;
286 mCFContext->fragmentData[ff].pageDigits[iSector][j].emplace_back(0);
287 }
288 fragmentExtends[ff] = false;
289 }
290 };
291 if (mCFContext->zsVersion >= ZSVersion::ZSVersionDenseLinkBased) {
292 for (uint32_t ff = 0; ff < firstPossibleFragment; ff++) {
293 handleExtends(ff);
294 }
295 }
296 for (uint32_t f = firstPossibleFragment; f < mCFContext->nFragments; f++) {
297 if (timeBin < (uint32_t)fragments[f].first.last() && (uint32_t)fragments[f].first.first() <= maxTimeBin) {
298 if (!fragments[f].second.hasData) {
299 fragments[f].second.hasData = 1;
300 fragments[f].second.zsPtrFirst = k;
301 fragments[f].second.zsPageFirst = l;
302 } else {
303 if (pageCounter > (uint32_t)fragments[f].second.pageCounter + 1) {
304 mCFContext->fragmentData[f].nPages[iSector][j] += emptyPages + pageCounter - fragments[f].second.pageCounter - 1;
305 for (uint32_t k2 = fragments[f].second.zsPtrLast - 1; k2 <= k; k2++) {
306 for (uint32_t l2 = ((int32_t)k2 == fragments[f].second.zsPtrLast - 1) ? fragments[f].second.zsPageLast : 0; l2 < (k2 < k ? mIOPtrs.tpcZS->sector[iSector].nZSPtr[j][k2] : l); l2++) {
307 if (doGPU) {
308 mCFContext->fragmentData[f].pageDigits[iSector][j].emplace_back(0);
309 } else {
310 // CPU cannot skip unneeded pages, so we must keep space to store the invalid dummy clusters
311 const uint8_t* const pageTmp = ((const uint8_t*)mIOPtrs.tpcZS->sector[iSector].zsPtr[j][k2]) + l2 * TPCZSHDR::TPC_ZS_PAGE_SIZE;
312 const o2::header::RAWDataHeader* rdhTmp = (const o2::header::RAWDataHeader*)pageTmp;
313 if (o2::raw::RDHUtils::getMemorySize(*rdhTmp) != sizeof(o2::header::RAWDataHeader)) {
314 const TPCZSHDR* const hdrTmp = (const TPCZSHDR*)(rdh_utils::getLink(o2::raw::RDHUtils::getFEEID(*rdhTmp)) == rdh_utils::DLBZSLinkID ? (pageTmp + o2::raw::RDHUtils::getMemorySize(*rdhTmp) - sizeof(TPCZSHDRV2)) : (pageTmp + sizeof(o2::header::RAWDataHeader)));
315 mCFContext->fragmentData[f].nDigits[iSector][j] += hdrTmp->nADCsamples;
316 }
317 }
318 }
319 }
320 } else if (emptyPages) {
321 mCFContext->fragmentData[f].nPages[iSector][j] += emptyPages;
322 if (doGPU) {
323 for (uint32_t m = 0; m < emptyPages; m++) {
324 mCFContext->fragmentData[f].pageDigits[iSector][j].emplace_back(0);
325 }
326 }
327 }
328 }
329 fragments[f].second.zsPtrLast = k + 1;
330 fragments[f].second.zsPageLast = l + 1;
331 fragments[f].second.pageCounter = pageCounter;
332 mCFContext->fragmentData[f].nPages[iSector][j]++;
333 mCFContext->fragmentData[f].nDigits[iSector][j] += hdr->nADCsamples;
334 if (doGPU) {
335 mCFContext->fragmentData[f].pageDigits[iSector][j].emplace_back(hdr->nADCsamples);
336 }
337 fragmentExtends[f] = extendsInNextPage;
338 } else {
339 handleExtends(f);
340 if (timeBin < (uint32_t)fragments[f].first.last()) {
341 if (mCFContext->zsVersion >= ZSVersion::ZSVersionDenseLinkBased) {
342 for (uint32_t ff = f + 1; ff < mCFContext->nFragments; ff++) {
343 handleExtends(ff);
344 }
345 }
346 break;
347 } else {
348 firstPossibleFragment = f + 1;
349 }
350 }
351 }
352 emptyPages = 0;
353 }
354 }
355 for (uint32_t f = 0; f < mCFContext->nFragments; f++) {
356 mCFContext->fragmentData[f].minMaxCN[iSector][j].zsPtrLast = fragments[f].second.zsPtrLast;
357 mCFContext->fragmentData[f].minMaxCN[iSector][j].zsPtrFirst = fragments[f].second.zsPtrFirst;
358 mCFContext->fragmentData[f].minMaxCN[iSector][j].zsPageLast = fragments[f].second.zsPageLast;
359 mCFContext->fragmentData[f].minMaxCN[iSector][j].zsPageFirst = fragments[f].second.zsPageFirst;
360 }
361 }
362 mCFContext->nPagesTotal += nPages;
363 mCFContext->nPagesSector[iSector] = nPages;
364
365 mCFContext->nDigitsEndpointMax[iSector] = 0;
366 for (uint32_t i = 0; i < GPUTrackingInOutZS::NENDPOINTS; i++) {
367 if (endpointAdcSamples[i] > mCFContext->nDigitsEndpointMax[iSector]) {
368 mCFContext->nDigitsEndpointMax[iSector] = endpointAdcSamples[i];
369 }
370 }
371 uint32_t nDigitsFragmentMax = 0;
372 for (uint32_t i = 0; i < mCFContext->nFragments; i++) {
373 uint32_t pagesInFragment = 0;
374 uint32_t digitsInFragment = 0;
375 for (uint16_t j = 0; j < GPUTrackingInOutZS::NENDPOINTS; j++) {
376 pagesInFragment += mCFContext->fragmentData[i].nPages[iSector][j];
377 digitsInFragment += mCFContext->fragmentData[i].nDigits[iSector][j];
378 }
379 mCFContext->nPagesFragmentMax = std::max(mCFContext->nPagesFragmentMax, pagesInFragment);
380 nDigitsFragmentMax = std::max(nDigitsFragmentMax, digitsInFragment);
381 }
382 mRec->getGeneralStepTimer(GeneralStep::Prepare).Stop();
383 return {nDigits, nDigitsFragmentMax};
384}
385
386void GPUChainTracking::RunTPCClusterizer_compactPeaks(GPUTPCClusterFinder& clusterer, GPUTPCClusterFinder& clustererShadow, int32_t stage, bool doGPU, int32_t lane)
387{
388 auto& in = stage ? clustererShadow.mPpeakPositions : clustererShadow.mPpositions;
389 auto& out = stage ? clustererShadow.mPfilteredPeakPositions : clustererShadow.mPpeakPositions;
390 if (doGPU) {
391 const uint32_t iSector = clusterer.mISector;
392 auto& count = stage ? clusterer.mPmemory->counters.nPeaks : clusterer.mPmemory->counters.nPositions;
393
394 std::vector<size_t> counts;
395
396 uint32_t nSteps = clusterer.getNSteps(count);
397 if (nSteps > clusterer.mNBufs) {
398 GPUError("Clusterer buffers exceeded (%u > %u)", nSteps, (int32_t)clusterer.mNBufs);
399 exit(1);
400 }
401
402 int32_t scanWorkgroupSize = mRec->getGPUParameters(doGPU).par_CF_SCAN_WORKGROUP_SIZE;
403 size_t tmpCount = count;
404 if (nSteps > 1) {
405 for (uint32_t i = 1; i < nSteps; i++) {
406 counts.push_back(tmpCount);
407 if (i == 1) {
408 runKernel<GPUTPCCFStreamCompaction, GPUTPCCFStreamCompaction::scanStart>({GetGrid(tmpCount, scanWorkgroupSize, lane), {iSector}}, i, stage);
409 } else {
410 runKernel<GPUTPCCFStreamCompaction, GPUTPCCFStreamCompaction::scanUp>({GetGrid(tmpCount, scanWorkgroupSize, lane), {iSector}}, i, tmpCount);
411 }
412 tmpCount = (tmpCount + scanWorkgroupSize - 1) / scanWorkgroupSize;
413 }
414
415 runKernel<GPUTPCCFStreamCompaction, GPUTPCCFStreamCompaction::scanTop>({GetGrid(tmpCount, scanWorkgroupSize, lane), {iSector}}, nSteps, tmpCount);
416
417 for (uint32_t i = nSteps - 1; i > 1; i--) {
418 tmpCount = counts[i - 1];
419 runKernel<GPUTPCCFStreamCompaction, GPUTPCCFStreamCompaction::scanDown>({GetGrid(tmpCount - scanWorkgroupSize, scanWorkgroupSize, lane), {iSector}}, i, scanWorkgroupSize, tmpCount);
420 }
421 }
422
423 runKernel<GPUTPCCFStreamCompaction, GPUTPCCFStreamCompaction::compactDigits>({GetGrid(count, scanWorkgroupSize, lane), {iSector}}, 1, stage, in, out);
424 } else {
425 auto& nOut = stage ? clusterer.mPmemory->counters.nClusters : clusterer.mPmemory->counters.nPeaks;
426 auto& nIn = stage ? clusterer.mPmemory->counters.nPeaks : clusterer.mPmemory->counters.nPositions;
427 size_t count = 0;
428 for (size_t i = 0; i < nIn; i++) {
429 if (clusterer.mPisPeak[i]) {
430 out[count++] = in[i];
431 }
432 }
433 nOut = count;
434 }
435}
436
437std::pair<uint32_t, uint32_t> GPUChainTracking::RunTPCClusterizer_transferZS(int32_t iSector, const CfFragment& fragment, int32_t lane)
438{
439 bool doGPU = GetRecoStepsGPU() & RecoStep::TPCClusterFinding;
440 if (mCFContext->abandonTimeframe) {
441 return {0, 0};
442 }
443 const auto& retVal = TPCClusterizerDecodeZSCountUpdate(iSector, fragment);
444 if (doGPU) {
445 GPUTPCClusterFinder& clusterer = processors()->tpcClusterer[iSector];
446 GPUTPCClusterFinder& clustererShadow = doGPU ? processorsShadow()->tpcClusterer[iSector] : clusterer;
447 uint32_t nPagesSector = 0;
448 for (uint32_t j = 0; j < GPUTrackingInOutZS::NENDPOINTS; j++) {
449 uint32_t nPages = 0;
450 mInputsHost->mPzsMeta->sector[iSector].zsPtr[j] = &mInputsShadow->mPzsPtrs[iSector * GPUTrackingInOutZS::NENDPOINTS + j];
451 mInputsHost->mPzsPtrs[iSector * GPUTrackingInOutZS::NENDPOINTS + j] = clustererShadow.mPzs + (nPagesSector + nPages) * TPCZSHDR::TPC_ZS_PAGE_SIZE;
452 for (uint32_t k = clusterer.mMinMaxCN[j].zsPtrFirst; k < clusterer.mMinMaxCN[j].zsPtrLast; k++) {
453 const uint32_t min = (k == clusterer.mMinMaxCN[j].zsPtrFirst) ? clusterer.mMinMaxCN[j].zsPageFirst : 0;
454 const uint32_t max = (k + 1 == clusterer.mMinMaxCN[j].zsPtrLast) ? clusterer.mMinMaxCN[j].zsPageLast : mIOPtrs.tpcZS->sector[iSector].nZSPtr[j][k];
455 if (max > min) {
456 char* src = (char*)mIOPtrs.tpcZS->sector[iSector].zsPtr[j][k] + min * TPCZSHDR::TPC_ZS_PAGE_SIZE;
457 char* ptrLast = (char*)mIOPtrs.tpcZS->sector[iSector].zsPtr[j][k] + (max - 1) * TPCZSHDR::TPC_ZS_PAGE_SIZE;
458 size_t size = (ptrLast - src) + o2::raw::RDHUtils::getMemorySize(*(const o2::header::RAWDataHeader*)ptrLast);
459 GPUMemCpy(RecoStep::TPCClusterFinding, clustererShadow.mPzs + (nPagesSector + nPages) * TPCZSHDR::TPC_ZS_PAGE_SIZE, src, size, lane, true);
460 }
461 nPages += max - min;
462 }
463 mInputsHost->mPzsMeta->sector[iSector].nZSPtr[j] = &mInputsShadow->mPzsSizes[iSector * GPUTrackingInOutZS::NENDPOINTS + j];
464 mInputsHost->mPzsSizes[iSector * GPUTrackingInOutZS::NENDPOINTS + j] = nPages;
465 mInputsHost->mPzsMeta->sector[iSector].count[j] = 1;
466 nPagesSector += nPages;
467 }
468 GPUMemCpy(RecoStep::TPCClusterFinding, clustererShadow.mPzsOffsets, clusterer.mPzsOffsets, clusterer.mNMaxPages * sizeof(*clusterer.mPzsOffsets), lane, true);
469 }
470 return retVal;
471}
472
473int32_t GPUChainTracking::RunTPCClusterizer_prepare(bool restorePointers)
474{
476 if (restorePointers) {
477 for (uint32_t iSector = 0; iSector < NSECTORS; iSector++) {
478 processors()->tpcClusterer[iSector].mPzsOffsets = mCFContext->ptrSave[iSector].zsOffsetHost;
479 processorsShadow()->tpcClusterer[iSector].mPzsOffsets = mCFContext->ptrSave[iSector].zsOffsetDevice;
480 processorsShadow()->tpcClusterer[iSector].mPzs = mCFContext->ptrSave[iSector].zsDevice;
481 }
482 processorsShadow()->ioPtrs.clustersNative = mCFContext->ptrClusterNativeSave;
483 return 0;
484 }
485 const auto& threadContext = GetThreadContext();
487 if (mCFContext == nullptr) {
489 }
490 const int16_t maxFragmentLen = GetProcessingSettings().overrideClusterizerFragmentLen;
491 const uint32_t maxAllowedTimebin = param().par.continuousTracking ? std::max<int32_t>(param().continuousMaxTimeBin, maxFragmentLen) : TPC_MAX_TIME_BIN_TRIGGERED;
492 mCFContext->tpcMaxTimeBin = maxAllowedTimebin;
493 const CfFragment fragmentMax{(tpccf::TPCTime)mCFContext->tpcMaxTimeBin + 1, maxFragmentLen};
494 mCFContext->prepare(mIOPtrs.tpcZS, fragmentMax);
495 if (GetProcessingSettings().param.tpcTriggerHandling) {
496 mTriggerBuffer->triggers.clear();
497 }
498 if (mIOPtrs.tpcZS) {
499 uint32_t nDigitsFragmentMax[NSECTORS];
500 mCFContext->zsVersion = -1;
501 for (uint32_t iSector = 0; iSector < NSECTORS; iSector++) {
502 if (mIOPtrs.tpcZS->sector[iSector].count[0]) {
503 const void* rdh = mIOPtrs.tpcZS->sector[iSector].zsPtr[0][0];
504 if (rdh && o2::raw::RDHUtils::getVersion<o2::header::RAWDataHeaderV6>() > o2::raw::RDHUtils::getVersion(rdh)) {
505 GPUError("Data has invalid RDH version %d, %d required\n", o2::raw::RDHUtils::getVersion(rdh), o2::raw::RDHUtils::getVersion<o2::header::RAWDataHeader>());
506 return 1;
507 }
508 }
509
510 if (GetProcessingSettings().prefetchTPCpageScan >= 1 && iSector < NSECTORS - 1) {
511 for (uint32_t j = 0; j < GPUTrackingInOutZS::NENDPOINTS; j++) {
512 for (uint32_t k = 0; k < mIOPtrs.tpcZS->sector[iSector].count[j]; k++) {
513 for (uint32_t l = 0; l < mIOPtrs.tpcZS->sector[iSector].nZSPtr[j][k]; l++) {
514 Vc::Common::prefetchFar(((const uint8_t*)mIOPtrs.tpcZS->sector[iSector + 1].zsPtr[j][k]) + l * TPCZSHDR::TPC_ZS_PAGE_SIZE);
515 Vc::Common::prefetchFar(((const uint8_t*)mIOPtrs.tpcZS->sector[iSector + 1].zsPtr[j][k]) + l * TPCZSHDR::TPC_ZS_PAGE_SIZE + sizeof(o2::header::RAWDataHeader));
516 }
517 }
518 }
519 }
520
521 const auto& x = TPCClusterizerDecodeZSCount(iSector, fragmentMax);
522 nDigitsFragmentMax[iSector] = x.first;
523 processors()->tpcClusterer[iSector].mPmemory->counters.nDigits = x.first;
524 mRec->MemoryScalers()->nTPCdigits += x.first;
525 }
526 for (uint32_t iSector = 0; iSector < NSECTORS; iSector++) {
527 uint32_t nDigitsBase = nDigitsFragmentMax[iSector];
528 uint32_t threshold = 40000000;
529 uint32_t nDigitsScaled = nDigitsBase > threshold ? nDigitsBase : std::min((threshold + nDigitsBase) / 2, 2 * nDigitsBase);
530 processors()->tpcClusterer[iSector].SetNMaxDigits(processors()->tpcClusterer[iSector].mPmemory->counters.nDigits, mCFContext->nPagesFragmentMax, nDigitsScaled, mCFContext->nDigitsEndpointMax[iSector]);
531 if (doGPU) {
532 processorsShadow()->tpcClusterer[iSector].SetNMaxDigits(processors()->tpcClusterer[iSector].mPmemory->counters.nDigits, mCFContext->nPagesFragmentMax, nDigitsScaled, mCFContext->nDigitsEndpointMax[iSector]);
533 }
534 if (mPipelineNotifyCtx && GetProcessingSettings().doublePipelineClusterizer) {
535 mPipelineNotifyCtx->rec->AllocateRegisteredForeignMemory(processors()->tpcClusterer[iSector].mZSOffsetId, mRec);
536 mPipelineNotifyCtx->rec->AllocateRegisteredForeignMemory(processors()->tpcClusterer[iSector].mZSId, mRec);
537 } else {
538 AllocateRegisteredMemory(processors()->tpcClusterer[iSector].mZSOffsetId);
539 AllocateRegisteredMemory(processors()->tpcClusterer[iSector].mZSId);
540 }
541 }
542 } else {
543 for (uint32_t iSector = 0; iSector < NSECTORS; iSector++) {
544 uint32_t nDigits = mIOPtrs.tpcPackedDigits->nTPCDigits[iSector];
545 mRec->MemoryScalers()->nTPCdigits += nDigits;
546 processors()->tpcClusterer[iSector].SetNMaxDigits(nDigits, mCFContext->nPagesFragmentMax, nDigits, 0);
547 }
548 }
549
550 if (mIOPtrs.tpcZS) {
551 GPUInfo("Event has %u 8kb TPC ZS pages (version %d), %ld digits", mCFContext->nPagesTotal, mCFContext->zsVersion, (int64_t)mRec->MemoryScalers()->nTPCdigits);
552 } else {
553 GPUInfo("Event has %ld TPC Digits", (int64_t)mRec->MemoryScalers()->nTPCdigits);
554 }
555
556 if (mCFContext->tpcMaxTimeBin > maxAllowedTimebin) {
557 GPUError("Input data has invalid time bin %u > %d", mCFContext->tpcMaxTimeBin, maxAllowedTimebin);
558 if (GetProcessingSettings().ignoreNonFatalGPUErrors) {
559 mCFContext->abandonTimeframe = true;
560 mCFContext->tpcMaxTimeBin = maxAllowedTimebin;
561 } else {
562 return 1;
563 }
564 }
565
566 mCFContext->fragmentFirst = CfFragment{std::max<int32_t>(mCFContext->tpcMaxTimeBin + 1, maxFragmentLen), maxFragmentLen};
567 for (int32_t iSector = 0; iSector < GetProcessingSettings().nTPCClustererLanes && iSector < NSECTORS; iSector++) {
568 if (mIOPtrs.tpcZS && mCFContext->nPagesSector[iSector] && mCFContext->zsVersion != -1) {
569 mCFContext->nextPos[iSector] = RunTPCClusterizer_transferZS(iSector, mCFContext->fragmentFirst, GetProcessingSettings().nTPCClustererLanes + iSector);
570 }
571 }
572
573 if (mPipelineNotifyCtx && GetProcessingSettings().doublePipelineClusterizer) {
574 for (uint32_t iSector = 0; iSector < NSECTORS; iSector++) {
575 mCFContext->ptrSave[iSector].zsOffsetHost = processors()->tpcClusterer[iSector].mPzsOffsets;
576 mCFContext->ptrSave[iSector].zsOffsetDevice = processorsShadow()->tpcClusterer[iSector].mPzsOffsets;
577 mCFContext->ptrSave[iSector].zsDevice = processorsShadow()->tpcClusterer[iSector].mPzs;
578 }
579 }
580 return 0;
581}
582#endif
583
584int32_t GPUChainTracking::RunTPCClusterizer(bool synchronizeOutput)
585{
586 if (param().rec.fwdTPCDigitsAsClusters) {
587 return ForwardTPCDigits();
588 }
589#ifdef GPUCA_TPC_GEOMETRY_O2
590 [[maybe_unused]] int32_t tpcTimeBinCut = mUpdateNewCalibObjects && mNewCalibValues->newTPCTimeBinCut ? mNewCalibValues->tpcTimeBinCut : param().tpcCutTimeBin;
592 const auto& threadContext = GetThreadContext();
593 const bool doGPU = GetRecoStepsGPU() & RecoStep::TPCClusterFinding;
594 if (RunTPCClusterizer_prepare(mPipelineNotifyCtx && GetProcessingSettings().doublePipelineClusterizer)) {
595 return 1;
596 }
597 if (GetProcessingSettings().autoAdjustHostThreads && !doGPU) {
599 }
600
602 float tpcHitLowOccupancyScalingFactor = 1.f;
604 uint32_t nHitsBase = mRec->MemoryScalers()->nTPCHits;
605 uint32_t threshold = 30000000 / 256 * mIOPtrs.settingsTF->nHBFPerTF;
606 if (mIOPtrs.settingsTF->nHBFPerTF < 64) {
607 threshold *= 2;
608 }
609 mRec->MemoryScalers()->nTPCHits = std::max<uint32_t>(nHitsBase, std::min<uint32_t>(threshold, nHitsBase * 3.5f)); // Increase the buffer size for low occupancy data to compensate for noisy pads creating exceiive clusters
610 if (nHitsBase < threshold) {
611 float maxFactor = mRec->MemoryScalers()->nTPCHits < threshold * 2 / 3 ? 3 : (mRec->MemoryScalers()->nTPCHits < threshold ? 2.25f : 1.75f);
612 mRec->MemoryScalers()->temporaryFactor *= std::min(maxFactor, (float)threshold / nHitsBase);
613 tpcHitLowOccupancyScalingFactor = std::min(3.5f, (float)threshold / nHitsBase);
614 }
615 }
616 for (uint32_t iSector = 0; iSector < NSECTORS; iSector++) {
617 processors()->tpcClusterer[iSector].SetMaxData(mIOPtrs); // First iteration to set data sizes
618 }
619 mRec->ComputeReuseMax(nullptr); // Resolve maximums for shared buffers
620 for (uint32_t iSector = 0; iSector < NSECTORS; iSector++) {
621 SetupGPUProcessor(&processors()->tpcClusterer[iSector], true); // Now we allocate
622 }
623 if (mPipelineNotifyCtx && GetProcessingSettings().doublePipelineClusterizer) {
624 RunTPCClusterizer_prepare(true); // Restore some pointers, allocated by the other pipeline, and set to 0 by SetupGPUProcessor (since not allocated in this pipeline)
625 }
626
627 if (doGPU && mIOPtrs.tpcZS) {
629 WriteToConstantMemory(RecoStep::TPCClusterFinding, (char*)&processors()->ioPtrs - (char*)processors(), &processorsShadow()->ioPtrs, sizeof(processorsShadow()->ioPtrs), mRec->NStreams() - 1);
630 }
631 if (doGPU) {
632 WriteToConstantMemory(RecoStep::TPCClusterFinding, (char*)processors()->tpcClusterer - (char*)processors(), processorsShadow()->tpcClusterer, sizeof(GPUTPCClusterFinder) * NSECTORS, mRec->NStreams() - 1, &mEvents->init);
633 }
634
635#ifdef GPUCA_HAS_ONNX
636 const GPUSettingsProcessingNNclusterizer& nn_settings = GetProcessingSettings().nn;
637 GPUTPCNNClusterizerHost nnApplications[GetProcessingSettings().nTPCClustererLanes];
638
639 // Maximum of 4 lanes supported
640 HighResTimer* nnTimers[12];
641
642 if (GetProcessingSettings().nn.applyNNclusterizer) {
643 int32_t deviceId = -1;
644 int32_t numLanes = GetProcessingSettings().nTPCClustererLanes;
645 int32_t maxThreads = mRec->getNKernelHostThreads(true);
646 // bool recreateMemoryAllocator = false;
647
648 if (GetProcessingSettings().debugLevel >= 1) {
649 nnTimers[0] = &getTimer<GPUTPCNNClusterizer, 0>("GPUTPCNNClusterizer_ONNXClassification_0_", 0);
650 nnTimers[1] = &getTimer<GPUTPCNNClusterizer, 1>("GPUTPCNNClusterizer_ONNXRegression_1_", 1);
651 nnTimers[2] = &getTimer<GPUTPCNNClusterizer, 2>("GPUTPCNNClusterizer_ONNXRegression2_2_", 2);
652 nnTimers[3] = &getTimer<GPUTPCNNClusterizer, 3>("GPUTPCNNClusterizer_ONNXClassification_0_", 3);
653 nnTimers[4] = &getTimer<GPUTPCNNClusterizer, 4>("GPUTPCNNClusterizer_ONNXRegression_1_", 4);
654 nnTimers[5] = &getTimer<GPUTPCNNClusterizer, 5>("GPUTPCNNClusterizer_ONNXRegression2_2_", 5);
655 nnTimers[6] = &getTimer<GPUTPCNNClusterizer, 6>("GPUTPCNNClusterizer_ONNXClassification_0_", 6);
656 nnTimers[7] = &getTimer<GPUTPCNNClusterizer, 7>("GPUTPCNNClusterizer_ONNXRegression_1_", 7);
657 nnTimers[8] = &getTimer<GPUTPCNNClusterizer, 8>("GPUTPCNNClusterizer_ONNXRegression2_2_", 8);
658 nnTimers[9] = &getTimer<GPUTPCNNClusterizer, 9>("GPUTPCNNClusterizer_ONNXClassification_0_", 9);
659 nnTimers[10] = &getTimer<GPUTPCNNClusterizer, 10>("GPUTPCNNClusterizer_ONNXRegression_1_", 10);
660 nnTimers[11] = &getTimer<GPUTPCNNClusterizer, 11>("GPUTPCNNClusterizer_ONNXRegression2_2_", 11);
661 }
662
663 mRec->runParallelOuterLoop(doGPU, numLanes, [&](uint32_t lane) {
664 nnApplications[lane].init(nn_settings, GetProcessingSettings().deterministicGPUReconstruction);
665 if (nnApplications[lane].mModelsUsed[0]) {
666 SetONNXGPUStream(*(nnApplications[lane].mModelClass).getSessionOptions(), lane, &deviceId);
667 (nnApplications[lane].mModelClass).setDeviceId(deviceId);
668 if (nnApplications[lane].mModelClass.getIntraOpNumThreads() > maxThreads) {
669 nnApplications[lane].mModelClass.setIntraOpNumThreads(maxThreads);
670 }
671 (nnApplications[lane].mModelClass).initEnvironment();
672 // Registering this once seems to be enough, even with different environmnents / models. ONNX apparently uses this per device and stores the OrtAllocator internally. All models will then use the volatile allocation.
673 // But environment must be valid, so we init the model environment first and use it here afterwards.
674 // Either this is done in one environment with lane == 0 or by recreating the allocator using recreateMemoryAllocator.
675 // TODO: Volatile allocation works for reserving, but not yet for allocations when binding the input tensor
676 // if (lane == 0) {
677 // nnApplications[lane].directOrtAllocator((nnApplications[lane].mModelClass).getEnv(), (nnApplications[lane].mModelClass).getMemoryInfo(), mRec, recreateMemoryAllocator);
678 // }
679 // recreateMemoryAllocator = true;
680 (nnApplications[lane].mModelClass).initSession();
681 }
682 if (nnApplications[lane].mModelsUsed[1]) {
683 SetONNXGPUStream(*(nnApplications[lane].mModelReg1).getSessionOptions(), lane, &deviceId);
684 (nnApplications[lane].mModelReg1).setDeviceId(deviceId);
685 if (nnApplications[lane].mModelReg1.getIntraOpNumThreads() > maxThreads) {
686 nnApplications[lane].mModelReg1.setIntraOpNumThreads(maxThreads);
687 }
688 // (nnApplications[lane].mModelReg1).setEnv((nnApplications[lane].mModelClass).getEnv());
689 (nnApplications[lane].mModelReg1).initEnvironment();
690 // nnApplications[lane].directOrtAllocator((nnApplications[lane].mModelReg1).getEnv(), (nnApplications[lane].mModelReg1).getMemoryInfo(), mRec, recreateMemoryAllocator);
691 (nnApplications[lane].mModelReg1).initSession();
692 }
693 if (nnApplications[lane].mModelsUsed[2]) {
694 SetONNXGPUStream(*(nnApplications[lane].mModelReg2).getSessionOptions(), lane, &deviceId);
695 (nnApplications[lane].mModelReg2).setDeviceId(deviceId);
696 if (nnApplications[lane].mModelReg2.getIntraOpNumThreads() > maxThreads) {
697 nnApplications[lane].mModelReg2.setIntraOpNumThreads(maxThreads);
698 }
699 // (nnApplications[lane].mModelReg2).setEnv((nnApplications[lane].mModelClass).getEnv());
700 (nnApplications[lane].mModelReg2).initEnvironment();
701 // nnApplications[lane].directOrtAllocator((nnApplications[lane].mModelClass).getEnv(), (nnApplications[lane].mModelClass).getMemoryInfo(), mRec, recreateMemoryAllocator);
702 (nnApplications[lane].mModelReg2).initSession();
703 }
704 if (nn_settings.nnClusterizerVerbosity > 0) {
705 LOG(info) << "(ORT) Allocated ONNX stream for lane " << lane << " and device " << deviceId;
706 }
707 });
708 const int16_t maxFragmentLen = GetProcessingSettings().overrideClusterizerFragmentLen;
709 const uint32_t maxAllowedTimebin = param().par.continuousTracking ? std::max<int32_t>(param().continuousMaxTimeBin, maxFragmentLen) : TPC_MAX_TIME_BIN_TRIGGERED;
710 for (int32_t sector = 0; sector < NSECTORS; sector++) {
711 GPUTPCNNClusterizer& clustererNN = processors()->tpcNNClusterer[sector];
712 GPUTPCNNClusterizer& clustererNNShadow = doGPU ? processorsShadow()->tpcNNClusterer[sector] : clustererNN;
713 int32_t lane = sector % numLanes;
714 clustererNN.mDeviceId = deviceId;
715 clustererNN.mISector = sector;
717 nnApplications[lane].initClusterizer(nn_settings, clustererNN, maxFragmentLen, maxAllowedTimebin);
718 if (doGPU) {
719 clustererNNShadow.mDeviceId = deviceId;
720 clustererNNShadow.mISector = sector;
722 nnApplications[lane].initClusterizer(nn_settings, clustererNNShadow, maxFragmentLen, maxAllowedTimebin);
723 }
724 if (nn_settings.nnClusterizerVerbosity > 2) {
725 LOG(info) << "(NNCLUS, GPUChainTrackingClusterizer, this=" << this << ") Processor initialized. Sector " << sector << ", lane " << lane << ", max clusters " << clustererNN.mNnClusterizerTotalClusters << " (clustererNN=" << &clustererNN << ", clustererNNShadow=" << &clustererNNShadow << ")";
726 }
728 if (nn_settings.nnClusterizerVerbosity > 2) {
729 LOG(info) << "(NNCLUS, GPUChainTrackingClusterizer, this=" << this << ") Memory registered for memoryId " << clustererNN.mMemoryId << " (clustererNN=" << &clustererNN << ", clustererNNShadow=" << &clustererNNShadow << ")";
730 }
731 // nnApplications[lane].createBoundary(clustererNNShadow);
732 // nnApplications[lane].createIndexLookup(clustererNNShadow);
733 }
734 if (doGPU) {
735 if (nn_settings.nnClusterizerVerbosity > 2) {
736 LOG(info) << "(NNCLUS, GPUChainTrackingClusterizer, this=" << this << ") Writing to constant memory...";
737 }
738 WriteToConstantMemory(RecoStep::TPCClusterFinding, (char*)&processors()->tpcNNClusterer - (char*)processors(), &processorsShadow()->tpcNNClusterer, sizeof(GPUTPCNNClusterizer) * NSECTORS, mRec->NStreams() - 1, &mEvents->init);
739 if (nn_settings.nnClusterizerVerbosity > 2) {
740 LOG(info) << "(NNCLUS, GPUChainTrackingClusterizer, this=" << this << ") Writing to constant memory done";
741 }
742 }
743 }
744#endif
745
746 size_t nClsTotal = 0;
747 ClusterNativeAccess* tmpNativeAccess = mClusterNativeAccess.get();
748 ClusterNative* tmpNativeClusters = nullptr;
749 std::unique_ptr<ClusterNative[]> tmpNativeClusterBuffer;
750
751 // setup MC Labels
753
754 auto* digitsMC = propagateMCLabels ? processors()->ioPtrs.tpcPackedDigits->tpcDigitsMC : nullptr;
755
756 bool buildNativeGPU = doGPU && NeedTPCClustersOnGPU();
757 bool buildNativeHost = (mRec->GetRecoStepsOutputs() & GPUDataTypes::InOutType::TPCClusters) || GetProcessingSettings().deterministicGPUReconstruction; // TODO: Should do this also when clusters are needed for later steps on the host but not requested as output
758
759 mInputsHost->mNClusterNative = mInputsShadow->mNClusterNative = mRec->MemoryScalers()->nTPCHits * tpcHitLowOccupancyScalingFactor;
760 if (buildNativeGPU) {
761 AllocateRegisteredMemory(mInputsHost->mResourceClusterNativeBuffer);
762 }
763 if (mWaitForFinalInputs && GetProcessingSettings().nTPCClustererLanes > 6) {
764 GPUFatal("ERROR, mWaitForFinalInputs cannot be called with nTPCClustererLanes > 6");
765 }
766 if (buildNativeHost && !(buildNativeGPU && GetProcessingSettings().delayedOutput)) {
767 if (mWaitForFinalInputs) {
768 GPUFatal("Cannot use waitForFinalInput callback without delayed output");
769 }
770 if (!GetProcessingSettings().tpcApplyClusterFilterOnCPU) {
771 AllocateRegisteredMemory(mInputsHost->mResourceClusterNativeOutput, GetProcessingSettings().tpcWriteClustersAfterRejection ? nullptr : mSubOutputControls[GPUTrackingOutputs::getIndex(&GPUTrackingOutputs::clustersNative)]);
772 tmpNativeClusters = mInputsHost->mPclusterNativeOutput;
773 } else {
774 tmpNativeClusterBuffer = std::make_unique<ClusterNative[]>(mInputsHost->mNClusterNative);
775 tmpNativeClusters = tmpNativeClusterBuffer.get();
776 }
777 }
778
779 GPUTPCLinearLabels mcLinearLabels;
780 if (propagateMCLabels) {
781 // No need to overallocate here, nTPCHits is anyway an upper bound used for the GPU cluster buffer, and we can always enlarge the buffer anyway
782 mcLinearLabels.header.reserve(mRec->MemoryScalers()->nTPCHits / 2);
783 mcLinearLabels.data.reserve(mRec->MemoryScalers()->nTPCHits);
784 }
785
786 int8_t transferRunning[NSECTORS] = {0};
787 uint32_t outputQueueStart = mOutputQueue.size();
788
789 auto notifyForeignChainFinished = [this]() {
790 if (mPipelineNotifyCtx) {
791 SynchronizeStream(OutputStream()); // Must finish before updating ioPtrs in (global) constant memory
792 {
793 std::lock_guard<std::mutex> lock(mPipelineNotifyCtx->mutex);
794 mPipelineNotifyCtx->ready = true;
795 }
796 mPipelineNotifyCtx->cond.notify_one();
797 }
798 };
799 bool synchronizeCalibUpdate = false;
800
801 for (uint32_t iSectorBase = 0; iSectorBase < NSECTORS; iSectorBase += GetProcessingSettings().nTPCClustererLanes) {
802 std::vector<bool> laneHasData(GetProcessingSettings().nTPCClustererLanes, false);
803 static_assert(NSECTORS <= GPUCA_MAX_STREAMS, "Stream events must be able to hold all sectors");
804 const int32_t maxLane = std::min<int32_t>(GetProcessingSettings().nTPCClustererLanes, NSECTORS - iSectorBase);
805 for (CfFragment fragment = mCFContext->fragmentFirst; !fragment.isEnd(); fragment = fragment.next()) {
806 if (GetProcessingSettings().debugLevel >= 3) {
807 GPUInfo("Processing time bins [%d, %d) for sectors %d to %d", fragment.start, fragment.last(), iSectorBase, iSectorBase + GetProcessingSettings().nTPCClustererLanes - 1);
808 }
809 mRec->runParallelOuterLoop(doGPU, maxLane, [&](uint32_t lane) {
810 if (doGPU && fragment.index != 0) {
811 SynchronizeStream(lane); // Don't overwrite charge map from previous iteration until cluster computation is finished
812 }
813
814 uint32_t iSector = iSectorBase + lane;
815 GPUTPCClusterFinder& clusterer = processors()->tpcClusterer[iSector];
816 GPUTPCClusterFinder& clustererShadow = doGPU ? processorsShadow()->tpcClusterer[iSector] : clusterer;
817 clusterer.mPmemory->counters.nPeaks = clusterer.mPmemory->counters.nClusters = 0;
818 clusterer.mPmemory->fragment = fragment;
819
821 bool setDigitsOnGPU = doGPU && not mIOPtrs.tpcZS;
822 bool setDigitsOnHost = (not doGPU && not mIOPtrs.tpcZS) || propagateMCLabels;
823 auto* inDigits = mIOPtrs.tpcPackedDigits;
824 size_t numDigits = inDigits->nTPCDigits[iSector];
825 if (setDigitsOnGPU) {
826 GPUMemCpy(RecoStep::TPCClusterFinding, clustererShadow.mPdigits, inDigits->tpcDigits[iSector], sizeof(clustererShadow.mPdigits[0]) * numDigits, lane, true);
827 }
828 if (setDigitsOnHost) {
829 clusterer.mPdigits = const_cast<o2::tpc::Digit*>(inDigits->tpcDigits[iSector]); // TODO: Needs fixing (invalid const cast)
830 }
831 clusterer.mPmemory->counters.nDigits = numDigits;
832 }
833
834 if (mIOPtrs.tpcZS) {
835 if (mCFContext->nPagesSector[iSector] && mCFContext->zsVersion != -1) {
836 clusterer.mPmemory->counters.nPositions = mCFContext->nextPos[iSector].first;
837 clusterer.mPmemory->counters.nPagesSubsector = mCFContext->nextPos[iSector].second;
838 } else {
839 clusterer.mPmemory->counters.nPositions = clusterer.mPmemory->counters.nPagesSubsector = 0;
840 }
841 }
842 TransferMemoryResourceLinkToGPU(RecoStep::TPCClusterFinding, clusterer.mMemoryId, lane);
843
844 using ChargeMapType = decltype(*clustererShadow.mPchargeMap);
845 using PeakMapType = decltype(*clustererShadow.mPpeakMap);
846 runKernel<GPUMemClean16>({GetGridAutoStep(lane, RecoStep::TPCClusterFinding)}, clustererShadow.mPchargeMap, TPCMapMemoryLayout<ChargeMapType>::items(GetProcessingSettings().overrideClusterizerFragmentLen) * sizeof(ChargeMapType));
847 runKernel<GPUMemClean16>({GetGridAutoStep(lane, RecoStep::TPCClusterFinding)}, clustererShadow.mPpeakMap, TPCMapMemoryLayout<PeakMapType>::items(GetProcessingSettings().overrideClusterizerFragmentLen) * sizeof(PeakMapType));
848 if (fragment.index == 0) {
849 runKernel<GPUMemClean16>({GetGridAutoStep(lane, RecoStep::TPCClusterFinding)}, clustererShadow.mPpadIsNoisy, TPC_PADS_IN_SECTOR * sizeof(*clustererShadow.mPpadIsNoisy));
850 }
852
853 if (doGPU) {
854 if (mIOPtrs.tpcZS && mCFContext->nPagesSector[iSector] && mCFContext->zsVersion != -1) {
855 TransferMemoryResourceLinkToGPU(RecoStep::TPCClusterFinding, mInputsHost->mResourceZS, lane);
856 SynchronizeStream(GetProcessingSettings().nTPCClustererLanes + lane);
857 }
858 SynchronizeStream(mRec->NStreams() - 1); // Wait for copying to constant memory
859 }
860
861 if (mIOPtrs.tpcZS && (mCFContext->abandonTimeframe || !mCFContext->nPagesSector[iSector] || mCFContext->zsVersion == -1)) {
862 clusterer.mPmemory->counters.nPositions = 0;
863 return;
864 }
865 if (!mIOPtrs.tpcZS && mIOPtrs.tpcPackedDigits->nTPCDigits[iSector] == 0) {
866 clusterer.mPmemory->counters.nPositions = 0;
867 return;
868 }
869
870 if (propagateMCLabels && fragment.index == 0) {
871 clusterer.PrepareMC();
872 clusterer.mPinputLabels = digitsMC->v[iSector];
873 if (clusterer.mPinputLabels == nullptr) {
874 GPUFatal("MC label container missing, sector %d", iSector);
875 }
876 if (clusterer.mPinputLabels->getIndexedSize() != mIOPtrs.tpcPackedDigits->nTPCDigits[iSector]) {
877 GPUFatal("MC label container has incorrect number of entries: %d expected, has %d\n", (int32_t)mIOPtrs.tpcPackedDigits->nTPCDigits[iSector], (int32_t)clusterer.mPinputLabels->getIndexedSize());
878 }
879 }
880
881 if (GetProcessingSettings().tpcSingleSector == -1 || GetProcessingSettings().tpcSingleSector == (int32_t)iSector) {
882 if (not mIOPtrs.tpcZS) {
883 runKernel<GPUTPCCFChargeMapFiller, GPUTPCCFChargeMapFiller::findFragmentStart>({GetGrid(1, lane), {iSector}}, mIOPtrs.tpcZS == nullptr);
884 TransferMemoryResourceLinkToHost(RecoStep::TPCClusterFinding, clusterer.mMemoryId, lane);
885 } else if (propagateMCLabels) {
886 runKernel<GPUTPCCFChargeMapFiller, GPUTPCCFChargeMapFiller::findFragmentStart>({GetGrid(1, lane, GPUReconstruction::krnlDeviceType::CPU), {iSector}}, mIOPtrs.tpcZS == nullptr);
887 TransferMemoryResourceLinkToGPU(RecoStep::TPCClusterFinding, clusterer.mMemoryId, lane);
888 }
889 }
890
891 if (mIOPtrs.tpcZS) {
892 int32_t firstHBF = (mIOPtrs.settingsTF && mIOPtrs.settingsTF->hasTfStartOrbit) ? mIOPtrs.settingsTF->tfStartOrbit : ((mIOPtrs.tpcZS->sector[iSector].count[0] && mIOPtrs.tpcZS->sector[iSector].nZSPtr[0][0]) ? o2::raw::RDHUtils::getHeartBeatOrbit(*(const o2::header::RAWDataHeader*)mIOPtrs.tpcZS->sector[iSector].zsPtr[0][0]) : 0);
893 uint32_t nBlocks = doGPU ? clusterer.mPmemory->counters.nPagesSubsector : GPUTrackingInOutZS::NENDPOINTS;
894
895 switch (mCFContext->zsVersion) {
896 default:
897 GPUFatal("Data with invalid TPC ZS mode (%d) received", mCFContext->zsVersion);
898 break;
901 runKernel<GPUTPCCFDecodeZS>({GetGridBlk(nBlocks, lane), {iSector}}, firstHBF);
902 break;
904 runKernel<GPUTPCCFDecodeZSLink>({GetGridBlk(nBlocks, lane), {iSector}}, firstHBF);
905 break;
907 runKernel<GPUTPCCFDecodeZSDenseLink>({GetGridBlk(nBlocks, lane), {iSector}}, firstHBF);
908 break;
909 }
910 TransferMemoryResourceLinkToHost(RecoStep::TPCClusterFinding, clusterer.mMemoryId, lane);
911 } // clang-format off
912 });
913 mRec->runParallelOuterLoop(doGPU, maxLane, [&](uint32_t lane) {
914 uint32_t iSector = iSectorBase + lane;
915 if (doGPU) {
916 SynchronizeStream(lane);
917 }
918 if (mIOPtrs.tpcZS) {
919 CfFragment f = fragment.next();
920 int32_t nextSector = iSector;
921 if (f.isEnd()) {
922 nextSector += GetProcessingSettings().nTPCClustererLanes;
923 f = mCFContext->fragmentFirst;
924 }
925 if (nextSector < NSECTORS && mIOPtrs.tpcZS && mCFContext->nPagesSector[nextSector] && mCFContext->zsVersion != -1 && !mCFContext->abandonTimeframe) {
926 mCFContext->nextPos[nextSector] = RunTPCClusterizer_transferZS(nextSector, f, GetProcessingSettings().nTPCClustererLanes + lane);
927 }
928 }
929 GPUTPCClusterFinder& clusterer = processors()->tpcClusterer[iSector];
930 GPUTPCClusterFinder& clustererShadow = doGPU ? processorsShadow()->tpcClusterer[iSector] : clusterer;
931 if (clusterer.mPmemory->counters.nPositions == 0) {
932 return;
933 }
934 if (!mIOPtrs.tpcZS) {
935 runKernel<GPUTPCCFChargeMapFiller, GPUTPCCFChargeMapFiller::fillFromDigits>({GetGrid(clusterer.mPmemory->counters.nPositions, lane), {iSector}});
936 }
938 clusterer.DumpChargeMap(*mDebugFile, "Charges");
939 }
940
941 if (propagateMCLabels) {
942 runKernel<GPUTPCCFChargeMapFiller, GPUTPCCFChargeMapFiller::fillIndexMap>({GetGrid(clusterer.mPmemory->counters.nDigitsInFragment, lane, GPUReconstruction::krnlDeviceType::CPU), {iSector}});
943 }
944
945 bool checkForNoisyPads = (rec()->GetParam().rec.tpc.maxTimeBinAboveThresholdIn1000Bin > 0) || (rec()->GetParam().rec.tpc.maxConsecTimeBinAboveThreshold > 0);
946 checkForNoisyPads &= (rec()->GetParam().rec.tpc.noisyPadsQuickCheck ? fragment.index == 0 : true);
947 checkForNoisyPads &= !GetProcessingSettings().disableTPCNoisyPadFilter;
948
949 if (checkForNoisyPads) {
951
952 runKernel<GPUTPCCFCheckPadBaseline>({GetGridBlk(nBlocks, lane), {iSector}});
953 }
954
955 runKernel<GPUTPCCFPeakFinder>({GetGrid(clusterer.mPmemory->counters.nPositions, lane), {iSector}});
957 clusterer.DumpPeakMap(*mDebugFile, "Peaks");
958 }
959
960 RunTPCClusterizer_compactPeaks(clusterer, clustererShadow, 0, doGPU, lane);
961 TransferMemoryResourceLinkToHost(RecoStep::TPCClusterFinding, clusterer.mMemoryId, lane);
962 DoDebugAndDump(RecoStep::TPCClusterFinding, GPUChainTrackingDebugFlags::TPCClustererPeaks, clusterer, &GPUTPCClusterFinder::DumpPeaksCompacted, *mDebugFile); // clang-format off
963 });
964 mRec->runParallelOuterLoop(doGPU, maxLane, [&](uint32_t lane) {
965 uint32_t iSector = iSectorBase + lane;
966 GPUTPCClusterFinder& clusterer = processors()->tpcClusterer[iSector];
967 GPUTPCClusterFinder& clustererShadow = doGPU ? processorsShadow()->tpcClusterer[iSector] : clusterer;
968 if (doGPU) {
969 SynchronizeStream(lane);
970 }
971 if (clusterer.mPmemory->counters.nPeaks == 0) {
972 return;
973 }
974 runKernel<GPUTPCCFNoiseSuppression, GPUTPCCFNoiseSuppression::noiseSuppression>({GetGrid(clusterer.mPmemory->counters.nPeaks, lane), {iSector}});
975 runKernel<GPUTPCCFNoiseSuppression, GPUTPCCFNoiseSuppression::updatePeaks>({GetGrid(clusterer.mPmemory->counters.nPeaks, lane), {iSector}});
977 clusterer.DumpPeakMap(*mDebugFile, "Suppressed Peaks");
978 }
979
980 RunTPCClusterizer_compactPeaks(clusterer, clustererShadow, 1, doGPU, lane);
981 TransferMemoryResourceLinkToHost(RecoStep::TPCClusterFinding, clusterer.mMemoryId, lane);
983 });
984 mRec->runParallelOuterLoop(doGPU, maxLane, [&](uint32_t lane) {
985 uint32_t iSector = iSectorBase + lane;
986 GPUTPCClusterFinder& clusterer = processors()->tpcClusterer[iSector];
987 GPUTPCClusterFinder& clustererShadow = doGPU ? processorsShadow()->tpcClusterer[iSector] : clusterer;
988
989 if (doGPU) {
990 SynchronizeStream(lane);
991 }
992
993 if (fragment.index == 0) {
994 deviceEvent* waitEvent = nullptr;
995 if (transferRunning[lane] == 1) {
996 waitEvent = &mEvents->stream[lane];
997 transferRunning[lane] = 2;
998 }
999 runKernel<GPUMemClean16>({GetGridAutoStep(lane, RecoStep::TPCClusterFinding), krnlRunRangeNone, {nullptr, waitEvent}}, clustererShadow.mPclusterInRow, GPUCA_ROW_COUNT * sizeof(*clustererShadow.mPclusterInRow));
1000 }
1001
1002 if (clusterer.mPmemory->counters.nClusters == 0) {
1003 return;
1004 }
1005
1006 if (GetProcessingSettings().nn.applyNNclusterizer) {
1007#ifdef GPUCA_HAS_ONNX
1008 GPUTPCNNClusterizer& clustererNN = processors()->tpcNNClusterer[lane];
1009 GPUTPCNNClusterizer& clustererNNShadow = doGPU ? processorsShadow()->tpcNNClusterer[lane] : clustererNN;
1010 GPUTPCNNClusterizerHost& nnApplication = nnApplications[lane];
1011
1012 // int withMC = (doGPU && propagateMCLabels);
1013
1014 if (nn_settings.nnClusterizerApplyCfDeconvolution) {
1015 runKernel<GPUTPCCFDeconvolution>({GetGrid(clusterer.mPmemory->counters.nPositions, lane), {iSector}}, true);
1016 } else if (clustererNNShadow.mNnClusterizerSetDeconvolutionFlags) {
1017 runKernel<GPUTPCCFDeconvolution>({GetGrid(clusterer.mPmemory->counters.nPositions, lane), {iSector}}, false);
1018 }
1019
1020 // float time_clusterizer = 0, time_fill = 0, time_networks = 0;
1021 if (nn_settings.nnClusterizerVerbosity > 2) {
1022 LOG(info) << "(NNCLUS, GPUChainTrackingClusterizer, this=" << this << ") Starting loop over batched data. clustererNNShadow.mNnClusterizerBatchedMode=" << clustererNNShadow.mNnClusterizerBatchedMode << ", numLoops=" << std::ceil((float)clusterer.mPmemory->counters.nClusters / clustererNNShadow.mNnClusterizerBatchedMode) << ", numClusters=" << clusterer.mPmemory->counters.nClusters << ". (clustererNN=" << &clustererNN << ", clustererNNShadow=" << &clustererNNShadow << ")";
1023 }
1024 for (int batch = 0; batch < std::ceil((float)clusterer.mPmemory->counters.nClusters / clustererNNShadow.mNnClusterizerBatchedMode); batch++) {
1025 if (nn_settings.nnClusterizerVerbosity > 3) {
1026 LOG(info) << "(NNCLUS, GPUChainTrackingClusterizer, this=" << this << ") Start. Loop=" << batch << ". (clustererNN=" << &clustererNN << ", clustererNNShadow=" << &clustererNNShadow << ")";
1027 }
1028 uint batchStart = batch * clustererNNShadow.mNnClusterizerBatchedMode;
1029 size_t iSize = CAMath::Min((uint)clustererNNShadow.mNnClusterizerBatchedMode, (uint)(clusterer.mPmemory->counters.nClusters - batchStart));
1030
1031 // Filling the data
1032 if (mRec->IsGPU() || GetProcessingSettings().nn.nnClusterizerForceGpuInputFill) {
1033 // Fills element by element of each input matrix -> better parallelizability, but worse on CPU due to unnecessary computations
1034 runKernel<GPUTPCNNClusterizerKernels, GPUTPCNNClusterizerKernels::fillInputNNGPU>({GetGrid(iSize * clustererNNShadow.mNnClusterizerRowTimeSizeThreads , lane), krnlRunRangeNone}, iSector, clustererNNShadow.mNnInferenceInputDType, propagateMCLabels, batchStart);
1035 } else {
1036 // Fills the whole input matrix at once -> better performance on CPU, but worse parallelizability
1037 runKernel<GPUTPCNNClusterizerKernels, GPUTPCNNClusterizerKernels::fillInputNNCPU>({GetGrid(iSize, lane), krnlRunRangeNone}, iSector, clustererNNShadow.mNnInferenceInputDType, propagateMCLabels, batchStart);
1038 }
1039 if (nn_settings.nnClusterizerVerbosity > 3) {
1040 LOG(info) << "(NNCLUS, GPUChainTrackingClusterizer, this=" << this << ") Done filling data. Loop=" << batch << ". (clustererNN=" << &clustererNN << ", clustererNNShadow=" << &clustererNNShadow << ")";
1041 }
1042
1043 if (clustererNNShadow.mNnClusterizerSetDeconvolutionFlags) {
1044 runKernel<GPUTPCNNClusterizerKernels, GPUTPCNNClusterizerKernels::publishDeconvolutionFlags>({GetGrid(iSize, lane), krnlRunRangeNone}, iSector, clustererNNShadow.mNnInferenceInputDType, propagateMCLabels, batchStart); // Publishing the deconvolution flags
1045 if (nn_settings.nnClusterizerVerbosity > 3) {
1046 LOG(info) << "(NNCLUS, GPUChainTrackingClusterizer, this=" << this << ") Done setting deconvolution flags. Loop=" << batch << ". (clustererNN=" << &clustererNN << ", clustererNNShadow=" << &clustererNNShadow << ")";
1047 }
1048 }
1049
1050 // NN evaluations
1051 if(clustererNNShadow.mNnClusterizerUseClassification) {
1052 if(GetProcessingSettings().debugLevel >= 1 && (doGPU || lane < 4)) { nnTimers[3*lane]->Start(); }
1053 if (clustererNNShadow.mNnInferenceInputDType == 0) {
1054 if (clustererNNShadow.mNnInferenceOutputDType == 0) {
1055 (nnApplication.mModelClass).inference(clustererNNShadow.mInputData_16, iSize, clustererNNShadow.mModelProbabilities_16);
1056 } else if (clustererNNShadow.mNnInferenceOutputDType == 1) {
1057 (nnApplication.mModelClass).inference(clustererNNShadow.mInputData_16, iSize, clustererNNShadow.mModelProbabilities_32);
1058 }
1059 } else if (clustererNNShadow.mNnInferenceInputDType == 1) {
1060 if (clustererNNShadow.mNnInferenceOutputDType == 0) {
1061 (nnApplication.mModelClass).inference(clustererNNShadow.mInputData_32, iSize, clustererNNShadow.mModelProbabilities_16);
1062 } else if (clustererNNShadow.mNnInferenceOutputDType == 1) {
1063 (nnApplication.mModelClass).inference(clustererNNShadow.mInputData_32, iSize, clustererNNShadow.mModelProbabilities_32);
1064 }
1065 }
1066 if(GetProcessingSettings().debugLevel >= 1 && (doGPU || lane < 4)) { nnTimers[3*lane]->Stop(); } // doGPU || lane<4 -> only for GPU or first 4 CPU lanes (to limit number of concurrent timers). At least gives some statistics for CPU time...
1067 if (nn_settings.nnClusterizerVerbosity > 3) {
1068 LOG(info) << "(NNCLUS, GPUChainTrackingClusterizer, this=" << this << ") Done with NN classification inference. Loop=" << batch << ". (clustererNN=" << &clustererNN << ", clustererNNShadow=" << &clustererNNShadow << ")";
1069 }
1070 }
1071 if (!clustererNNShadow.mNnClusterizerUseCfRegression) {
1072 if(GetProcessingSettings().debugLevel >= 1 && (doGPU || lane < 4)) { nnTimers[3*lane + 1]->Start(); }
1073 if (clustererNNShadow.mNnInferenceInputDType == 0) {
1074 if (clustererNNShadow.mNnInferenceOutputDType == 0) {
1075 (nnApplication.mModelReg1).inference(clustererNNShadow.mInputData_16, iSize, clustererNNShadow.mOutputDataReg1_16);
1076 } else if (clustererNNShadow.mNnInferenceOutputDType == 1) {
1077 (nnApplication.mModelReg1).inference(clustererNNShadow.mInputData_16, iSize, clustererNNShadow.mOutputDataReg1_32);
1078 }
1079 } else if (clustererNNShadow.mNnInferenceInputDType == 1) {
1080 if (clustererNNShadow.mNnInferenceOutputDType == 0) {
1081 (nnApplication.mModelReg1).inference(clustererNNShadow.mInputData_32, iSize, clustererNNShadow.mOutputDataReg1_16);
1082 } else if (clustererNNShadow.mNnInferenceOutputDType == 1) {
1083 (nnApplication.mModelReg1).inference(clustererNNShadow.mInputData_32, iSize, clustererNNShadow.mOutputDataReg1_32);
1084 }
1085 }
1086 if(GetProcessingSettings().debugLevel >= 1 && (doGPU || lane < 4)) { nnTimers[3*lane + 1]->Stop(); }
1087 if (nnApplication.mModelClass.getNumOutputNodes()[0][1] > 1 && nnApplication.mModelReg2.isInitialized()) {
1088 if(GetProcessingSettings().debugLevel >= 1 && (doGPU || lane < 4)) { nnTimers[3*lane + 2]->Start(); }
1089 if (clustererNNShadow.mNnInferenceInputDType == 0) {
1090 if (clustererNNShadow.mNnInferenceOutputDType == 0) {
1091 (nnApplication.mModelReg2).inference(clustererNNShadow.mInputData_16, iSize, clustererNNShadow.mOutputDataReg2_16);
1092 } else if (clustererNNShadow.mNnInferenceOutputDType == 1) {
1093 (nnApplication.mModelReg2).inference(clustererNNShadow.mInputData_16, iSize, clustererNNShadow.mOutputDataReg2_32);
1094 }
1095 } else if (clustererNNShadow.mNnInferenceInputDType == 1) {
1096 if (clustererNNShadow.mNnInferenceOutputDType == 0) {
1097 (nnApplication.mModelReg2).inference(clustererNNShadow.mInputData_32, iSize, clustererNNShadow.mOutputDataReg2_16);
1098 } else if (clustererNNShadow.mNnInferenceOutputDType == 1) {
1099 (nnApplication.mModelReg2).inference(clustererNNShadow.mInputData_32, iSize, clustererNNShadow.mOutputDataReg2_32);
1100 }
1101 }
1102 if(GetProcessingSettings().debugLevel >= 1 && (doGPU || lane < 4)) { nnTimers[3*lane + 2]->Stop(); }
1103 }
1104 if (nn_settings.nnClusterizerVerbosity > 3) {
1105 LOG(info) << "(NNCLUS, GPUChainTrackingClusterizer, this=" << this << ") Done with NN regression inference. Loop=" << batch << ". (clustererNN=" << &clustererNN << ", clustererNNShadow=" << &clustererNNShadow << ")";
1106 }
1107 }
1108
1109 // Publishing kernels for class labels and regression results
1110 // In case classification should not be used, this kernel should still be executed to fill the mOutputDataClass array with default values
1111 if (nnApplication.mModelClass.getNumOutputNodes()[0][1] == 1) {
1112 runKernel<GPUTPCNNClusterizerKernels, GPUTPCNNClusterizerKernels::determineClass1Labels>({GetGrid(iSize, lane), krnlRunRangeNone}, iSector, clustererNNShadow.mNnInferenceOutputDType, propagateMCLabels, batchStart); // Assigning class labels
1113 } else {
1114 runKernel<GPUTPCNNClusterizerKernels, GPUTPCNNClusterizerKernels::determineClass2Labels>({GetGrid(iSize, lane), krnlRunRangeNone}, iSector, clustererNNShadow.mNnInferenceOutputDType, propagateMCLabels, batchStart); // Assigning class labels
1115 }
1116 if (!clustererNNShadow.mNnClusterizerUseCfRegression) {
1117 runKernel<GPUTPCNNClusterizerKernels, GPUTPCNNClusterizerKernels::publishClass1Regression>({GetGrid(iSize, lane), krnlRunRangeNone}, iSector, clustererNNShadow.mNnInferenceOutputDType, propagateMCLabels, batchStart); // Publishing class 1 regression results
1118 if (nnApplication.mModelClass.getNumOutputNodes()[0][1] > 1 && nnApplication.mModelReg2.isInitialized()) {
1119 runKernel<GPUTPCNNClusterizerKernels, GPUTPCNNClusterizerKernels::publishClass2Regression>({GetGrid(iSize, lane), krnlRunRangeNone}, iSector, clustererNNShadow.mNnInferenceOutputDType, propagateMCLabels, batchStart); // Publishing class 2 regression results
1120 }
1121 }
1122 if (nn_settings.nnClusterizerVerbosity > 3) {
1123 LOG(info) << "(NNCLUS, GPUChainTrackingClusterizer, this=" << this << ") Done publishing. Loop=" << batch << ". (clustererNN=" << &clustererNN << ", clustererNNShadow=" << &clustererNNShadow << ")";
1124 }
1125 }
1126
1127 if (clustererNNShadow.mNnClusterizerUseCfRegression) {
1128 if(!nn_settings.nnClusterizerApplyCfDeconvolution) { // If it is already applied don't do it twice, otherwise apply now
1129 runKernel<GPUTPCCFDeconvolution>({GetGrid(clusterer.mPmemory->counters.nPositions, lane), {iSector}}, true);
1130 }
1131 DoDebugAndDump(RecoStep::TPCClusterFinding, GPUChainTrackingDebugFlags::TPCClustererChargeMap, clusterer, &GPUTPCClusterFinder::DumpChargeMap, *mDebugFile, "Split Charges");
1132 runKernel<GPUTPCNNClusterizerKernels, GPUTPCNNClusterizerKernels::runCfClusterizer>({GetGrid(clusterer.mPmemory->counters.nClusters, lane), krnlRunRangeNone}, iSector, clustererNNShadow.mNnInferenceInputDType, propagateMCLabels, 0); // Running the CF regression kernel - no batching needed: batchStart = 0
1133 if (nn_settings.nnClusterizerVerbosity > 3) {
1134 LOG(info) << "(NNCLUS, GPUChainTrackingClusterizer, this=" << this << ") Done with CF regression. (clustererNN=" << &clustererNN << ", clustererNNShadow=" << &clustererNNShadow << ")";
1135 }
1136 }
1137#else
1138 GPUFatal("Project not compiled with neural network clusterization. Aborting.");
1139#endif
1140 } else {
1141 runKernel<GPUTPCCFDeconvolution>({GetGrid(clusterer.mPmemory->counters.nPositions, lane), {iSector}}, true);
1142 DoDebugAndDump(RecoStep::TPCClusterFinding, GPUChainTrackingDebugFlags::TPCClustererChargeMap, clusterer, &GPUTPCClusterFinder::DumpChargeMap, *mDebugFile, "Split Charges");
1143 runKernel<GPUTPCCFClusterizer>({GetGrid(clusterer.mPmemory->counters.nClusters, lane), {iSector}}, 0);
1144 }
1145
1146 if (doGPU && propagateMCLabels) {
1147 TransferMemoryResourceLinkToHost(RecoStep::TPCClusterFinding, clusterer.mScratchId, lane);
1148 if (doGPU) {
1149 SynchronizeStream(lane);
1150 }
1151 runKernel<GPUTPCCFClusterizer>({GetGrid(clusterer.mPmemory->counters.nClusters, lane, GPUReconstruction::krnlDeviceType::CPU), {iSector}}, 1); // Computes MC labels
1152 }
1153
1154 if (GetProcessingSettings().debugLevel >= 3) {
1155 GPUInfo("Sector %02d Fragment %02d Lane %d: Found clusters: digits %u peaks %u clusters %u", iSector, fragment.index, lane, (int32_t)clusterer.mPmemory->counters.nPositions, (int32_t)clusterer.mPmemory->counters.nPeaks, (int32_t)clusterer.mPmemory->counters.nClusters);
1156 }
1157
1158 TransferMemoryResourcesToHost(RecoStep::TPCClusterFinding, &clusterer, lane);
1159 laneHasData[lane] = true;
1160 // Include clusters in default debug mask, exclude other debug output by default
1161 DoDebugAndDump(RecoStep::TPCClusterFinding, GPUChainTrackingDebugFlags::TPCClustererClusters, clusterer, &GPUTPCClusterFinder::DumpClusters, *mDebugFile); // clang-format off
1162 });
1164 }
1165
1166 size_t nClsFirst = nClsTotal;
1167 bool anyLaneHasData = false;
1168 for (int32_t lane = 0; lane < maxLane; lane++) {
1169 uint32_t iSector = iSectorBase + lane;
1170 std::fill(&tmpNativeAccess->nClusters[iSector][0], &tmpNativeAccess->nClusters[iSector][0] + MAXGLOBALPADROW, 0);
1171 if (doGPU) {
1172 SynchronizeStream(lane);
1173 }
1174 GPUTPCClusterFinder& clusterer = processors()->tpcClusterer[iSector];
1175 GPUTPCClusterFinder& clustererShadow = doGPU ? processorsShadow()->tpcClusterer[iSector] : clusterer;
1176
1177 if (laneHasData[lane]) {
1178 anyLaneHasData = true;
1179 if (buildNativeGPU && GetProcessingSettings().tpccfGatherKernel) {
1180 runKernel<GPUTPCCFGather>({GetGridBlk(GPUCA_ROW_COUNT, mRec->NStreams() - 1), {iSector}}, &mInputsShadow->mPclusterNativeBuffer[nClsTotal]);
1181 }
1182 for (uint32_t j = 0; j < GPUCA_ROW_COUNT; j++) {
1183 if (nClsTotal + clusterer.mPclusterInRow[j] > mInputsHost->mNClusterNative) {
1184 clusterer.raiseError(GPUErrors::ERROR_CF_GLOBAL_CLUSTER_OVERFLOW, iSector * 1000 + j, nClsTotal + clusterer.mPclusterInRow[j], mInputsHost->mNClusterNative);
1185 continue;
1186 }
1187 if (buildNativeGPU) {
1188 if (!GetProcessingSettings().tpccfGatherKernel) {
1189 GPUMemCpyAlways(RecoStep::TPCClusterFinding, (void*)&mInputsShadow->mPclusterNativeBuffer[nClsTotal], (const void*)&clustererShadow.mPclusterByRow[j * clusterer.mNMaxClusterPerRow], sizeof(mIOPtrs.clustersNative->clustersLinear[0]) * clusterer.mPclusterInRow[j], mRec->NStreams() - 1, -2);
1190 }
1191 } else if (buildNativeHost) {
1192 GPUMemCpyAlways(RecoStep::TPCClusterFinding, (void*)&tmpNativeClusters[nClsTotal], (const void*)&clustererShadow.mPclusterByRow[j * clusterer.mNMaxClusterPerRow], sizeof(mIOPtrs.clustersNative->clustersLinear[0]) * clusterer.mPclusterInRow[j], mRec->NStreams() - 1, false);
1193 }
1194 tmpNativeAccess->nClusters[iSector][j] += clusterer.mPclusterInRow[j];
1195 nClsTotal += clusterer.mPclusterInRow[j];
1196 }
1197 if (transferRunning[lane]) {
1198 ReleaseEvent(mEvents->stream[lane], doGPU);
1199 }
1200 RecordMarker(&mEvents->stream[lane], mRec->NStreams() - 1);
1201 transferRunning[lane] = 1;
1202 }
1203
1204 if (not propagateMCLabels || not laneHasData[lane]) {
1205 assert(propagateMCLabels ? mcLinearLabels.header.size() == nClsTotal : true);
1206 continue;
1207 }
1208
1209 runKernel<GPUTPCCFMCLabelFlattener, GPUTPCCFMCLabelFlattener::setRowOffsets>({GetGrid(GPUCA_ROW_COUNT, lane, GPUReconstruction::krnlDeviceType::CPU), {iSector}});
1211 runKernel<GPUTPCCFMCLabelFlattener, GPUTPCCFMCLabelFlattener::flatten>({GetGrid(GPUCA_ROW_COUNT, lane, GPUReconstruction::krnlDeviceType::CPU), {iSector}}, &mcLinearLabels);
1212 clusterer.clearMCMemory();
1213 assert(propagateMCLabels ? mcLinearLabels.header.size() == nClsTotal : true);
1214 }
1215 if (propagateMCLabels) {
1216 for (int32_t lane = 0; lane < maxLane; lane++) {
1217 processors()->tpcClusterer[iSectorBase + lane].clearMCMemory();
1218 }
1219 }
1220 if (buildNativeHost && buildNativeGPU && anyLaneHasData) {
1221 if (GetProcessingSettings().delayedOutput) {
1222 mOutputQueue.emplace_back(outputQueueEntry{(void*)((char*)&tmpNativeClusters[nClsFirst] - (char*)&tmpNativeClusters[0]), &mInputsShadow->mPclusterNativeBuffer[nClsFirst], (nClsTotal - nClsFirst) * sizeof(tmpNativeClusters[0]), RecoStep::TPCClusterFinding});
1223 } else {
1224 GPUMemCpy(RecoStep::TPCClusterFinding, (void*)&tmpNativeClusters[nClsFirst], (const void*)&mInputsShadow->mPclusterNativeBuffer[nClsFirst], (nClsTotal - nClsFirst) * sizeof(tmpNativeClusters[0]), mRec->NStreams() - 1, false);
1225 }
1226 }
1227
1228 if (mWaitForFinalInputs && iSectorBase >= 21 && (int32_t)iSectorBase < 21 + GetProcessingSettings().nTPCClustererLanes) {
1229 notifyForeignChainFinished();
1230 }
1231 if (mWaitForFinalInputs && iSectorBase >= 30 && (int32_t)iSectorBase < 30 + GetProcessingSettings().nTPCClustererLanes) {
1232 mWaitForFinalInputs();
1233 synchronizeCalibUpdate = DoQueuedUpdates(0, false);
1234 }
1235 }
1236 for (int32_t i = 0; i < GetProcessingSettings().nTPCClustererLanes; i++) {
1237#ifdef GPUCA_HAS_ONNX
1238 if (GetProcessingSettings().nn.applyNNclusterizer) {
1239 if (GetProcessingSettings().nn.nnClusterizerVerbosity > 0) {
1240 LOG(info) << "(ORT) Environment releasing...";
1241 }
1242 GPUTPCNNClusterizerHost& nnApplication = nnApplications[i];
1243 nnApplication.mModelClass.release(true);
1244 nnApplication.mModelReg1.release(true);
1245 nnApplication.mModelReg2.release(true);
1246 }
1247#endif
1248 if (transferRunning[i]) {
1249 ReleaseEvent(mEvents->stream[i], doGPU);
1250 }
1251 }
1252
1253 if (GetProcessingSettings().param.tpcTriggerHandling) {
1255 if (triggerOutput && triggerOutput->allocator) {
1256 // GPUInfo("Storing %lu trigger words", mTriggerBuffer->triggers.size());
1257 auto* outputBuffer = (decltype(mTriggerBuffer->triggers)::value_type*)triggerOutput->allocator(mTriggerBuffer->triggers.size() * sizeof(decltype(mTriggerBuffer->triggers)::value_type));
1258 std::copy(mTriggerBuffer->triggers.begin(), mTriggerBuffer->triggers.end(), outputBuffer);
1259 }
1260 mTriggerBuffer->triggers.clear();
1261 }
1262
1263 ClusterNativeAccess::ConstMCLabelContainerView* mcLabelsConstView = nullptr;
1264 if (propagateMCLabels) {
1265 // TODO: write to buffer directly
1267 std::pair<ConstMCLabelContainer*, ConstMCLabelContainerView*> buffer;
1270 throw std::runtime_error("Cluster MC Label buffer missing");
1271 }
1273 buffer = {&container->first, &container->second};
1274 } else {
1275 mIOMem.clusterNativeMCView = std::make_unique<ConstMCLabelContainerView>();
1276 mIOMem.clusterNativeMCBuffer = std::make_unique<ConstMCLabelContainer>();
1277 buffer.first = mIOMem.clusterNativeMCBuffer.get();
1278 buffer.second = mIOMem.clusterNativeMCView.get();
1279 }
1280
1281 assert(propagateMCLabels ? mcLinearLabels.header.size() == nClsTotal : true);
1282 assert(propagateMCLabels ? mcLinearLabels.data.size() >= nClsTotal : true);
1283
1284 mcLabels.setFrom(mcLinearLabels.header, mcLinearLabels.data);
1285 mcLabels.flatten_to(*buffer.first);
1286 *buffer.second = *buffer.first;
1287 mcLabelsConstView = buffer.second;
1288 }
1289
1290 if (buildNativeHost && buildNativeGPU && GetProcessingSettings().delayedOutput) {
1291 mInputsHost->mNClusterNative = mInputsShadow->mNClusterNative = nClsTotal;
1292 AllocateRegisteredMemory(mInputsHost->mResourceClusterNativeOutput, GetProcessingSettings().tpcWriteClustersAfterRejection ? nullptr : mSubOutputControls[GPUTrackingOutputs::getIndex(&GPUTrackingOutputs::clustersNative)]);
1293 tmpNativeClusters = mInputsHost->mPclusterNativeOutput;
1294 for (uint32_t i = outputQueueStart; i < mOutputQueue.size(); i++) {
1295 mOutputQueue[i].dst = (char*)tmpNativeClusters + (size_t)mOutputQueue[i].dst;
1296 }
1297 }
1298
1299 if (buildNativeHost) {
1300 tmpNativeAccess->clustersLinear = tmpNativeClusters;
1301 tmpNativeAccess->clustersMCTruth = mcLabelsConstView;
1302 tmpNativeAccess->setOffsetPtrs();
1303 mIOPtrs.clustersNative = tmpNativeAccess;
1304 if (GetProcessingSettings().tpcApplyClusterFilterOnCPU) {
1305 auto allocator = [this, &tmpNativeClusters](size_t size) {
1306 this->mInputsHost->mNClusterNative = size;
1307 this->AllocateRegisteredMemory(this->mInputsHost->mResourceClusterNativeOutput, this->GetProcessingSettings().tpcWriteClustersAfterRejection ? nullptr : this->mSubOutputControls[GPUTrackingOutputs::getIndex(&GPUTrackingOutputs::clustersNative)]);
1308 return (tmpNativeClusters = this->mInputsHost->mPclusterNativeOutput);
1309 };
1310 RunTPCClusterFilter(tmpNativeAccess, allocator, false);
1311 nClsTotal = tmpNativeAccess->nClustersTotal;
1312 }
1313 }
1314
1315 if (!mWaitForFinalInputs) {
1316 notifyForeignChainFinished();
1317 }
1318
1319 if (buildNativeGPU) {
1320 processorsShadow()->ioPtrs.clustersNative = mInputsShadow->mPclusterNativeAccess;
1321 WriteToConstantMemory(RecoStep::TPCClusterFinding, (char*)&processors()->ioPtrs - (char*)processors(), &processorsShadow()->ioPtrs, sizeof(processorsShadow()->ioPtrs), 0);
1322 *mInputsHost->mPclusterNativeAccess = *mIOPtrs.clustersNative;
1323 mInputsHost->mPclusterNativeAccess->clustersLinear = mInputsShadow->mPclusterNativeBuffer;
1324 mInputsHost->mPclusterNativeAccess->setOffsetPtrs();
1325 TransferMemoryResourceLinkToGPU(RecoStep::TPCClusterFinding, mInputsHost->mResourceClusterNativeAccess, 0);
1326 }
1327 if (doGPU && synchronizeOutput) {
1329 }
1330 if (doGPU && synchronizeCalibUpdate) {
1332 }
1333 if (buildNativeHost && (GetProcessingSettings().deterministicGPUReconstruction || GetProcessingSettings().debugLevel >= 4)) {
1334 for (uint32_t i = 0; i < NSECTORS; i++) {
1335 for (uint32_t j = 0; j < GPUCA_ROW_COUNT; j++) {
1336 std::sort(&tmpNativeClusters[tmpNativeAccess->clusterOffset[i][j]], &tmpNativeClusters[tmpNativeAccess->clusterOffset[i][j] + tmpNativeAccess->nClusters[i][j]]);
1337 }
1338 }
1339 if (buildNativeGPU) {
1340 GPUMemCpy(RecoStep::TPCClusterFinding, (void*)mInputsShadow->mPclusterNativeBuffer, (const void*)tmpNativeClusters, nClsTotal * sizeof(tmpNativeClusters[0]), -1, true);
1341 }
1342 }
1343 mRec->MemoryScalers()->nTPCHits = nClsTotal;
1344 mRec->PopNonPersistentMemory(RecoStep::TPCClusterFinding, qStr2Tag("TPCCLUST"));
1345 if (mPipelineNotifyCtx) {
1347 mPipelineNotifyCtx = nullptr;
1348 }
1349
1350 if (GetProcessingSettings().autoAdjustHostThreads && !doGPU) {
1352 }
1353
1354#endif
1355 return 0;
1356}
Definition of the TPC Digit.
int32_t i
#define TPC_MAX_TIME_BIN_TRIGGERED
#define GPUCA_MAX_STREAMS
int32_t retVal
#define GPUCA_ROW_COUNT
std::enable_if_t< std::is_signed< T >::value, bool > hasData(const CalArray< T > &cal)
Definition Painter.cxx:599
uint32_t j
Definition RawData.h:0
uint8_t endpoint
Definition RawData.h:0
Provides a basic fallback implementation for Vc.
Definitions of TPC Zero Suppression Data Headers.
void Start()
Definition timer.cxx:64
void Stop()
Definition timer.cxx:76
A container to hold and manage MC truth information/labels.
void setFrom(std::vector< MCTruthHeaderElement > &header, std::vector< TruthElement > &truthArray)
size_t flatten_to(ContainerType &container) const
std::unique_ptr< o2::tpc::ClusterNativeAccess > mClusterNativeAccess
int32_t RunTPCClusterizer(bool synchronizeOutput=true)
std::unique_ptr< GPUTrackingInputProvider > mInputsHost
std::array< GPUOutputControl *, GPUTrackingOutputs::count()> mSubOutputControls
std::unique_ptr< std::ofstream > mDebugFile
std::unique_ptr< GPUTriggerOutputs > mTriggerBuffer
std::vector< outputQueueEntry > mOutputQueue
std::unique_ptr< GPUTPCCFChainContext > mCFContext
int32_t DoQueuedUpdates(int32_t stream, bool updateSlave=true)
std::unique_ptr< GPUNewCalibValues > mNewCalibValues
GPUTrackingInOutPointers & mIOPtrs
struct o2::gpu::GPUChainTracking::InOutMemory mIOMem
std::unique_ptr< GPUTrackingInputProvider > mInputsShadow
void RecordMarker(deviceEvent *ev, int32_t stream)
Definition GPUChain.h:108
void TransferMemoryResourceLinkToGPU(RecoStep step, int16_t res, int32_t stream=-1, deviceEvent *ev=nullptr, deviceEvent *evList=nullptr, int32_t nEvents=1)
Definition GPUChain.h:124
void GPUMemCpyAlways(RecoStep step, void *dst, const void *src, size_t size, int32_t stream, int32_t toGPU, deviceEvent *ev=nullptr, deviceEvent *evList=nullptr, int32_t nEvents=1)
Definition GPUChain.h:129
void GPUMemCpy(RecoStep step, void *dst, const void *src, size_t size, int32_t stream, int32_t toGPU, deviceEvent *ev=nullptr, deviceEvent *evList=nullptr, int32_t nEvents=1)
Definition GPUChain.h:128
bool DoDebugAndDump(RecoStep step, uint32_t mask, T &processor, S T::*func, Args &&... args)
Definition GPUChain.h:230
GPUReconstruction::RecoStepField GetRecoStepsGPU() const
Definition GPUChain.h:72
void WriteToConstantMemory(RecoStep step, size_t offset, const void *src, size_t size, int32_t stream=-1, deviceEvent *ev=nullptr)
Definition GPUChain.h:127
void ReleaseEvent(deviceEvent ev, bool doGPU=true)
Definition GPUChain.h:111
size_t AllocateRegisteredMemory(GPUProcessor *proc)
Definition GPUChain.h:217
virtual std::unique_ptr< GPUReconstructionProcessing::threadContext > GetThreadContext()
Definition GPUChain.h:109
GPUConstantMem * processors()
Definition GPUChain.h:84
static constexpr krnlRunRange krnlRunRangeNone
Definition GPUChain.h:41
void SetONNXGPUStream(Ort::SessionOptions &opt, int32_t stream, int32_t *deviceId)
Definition GPUChain.h:90
GPUParam & param()
Definition GPUChain.h:87
void SetupGPUProcessor(T *proc, bool allocate)
Definition GPUChain.h:220
const GPUSettingsProcessing & GetProcessingSettings() const
Definition GPUChain.h:76
void SynchronizeStream(int32_t stream)
Definition GPUChain.h:89
GPUReconstructionCPU * mRec
Definition GPUChain.h:79
GPUConstantMem * processorsShadow()
Definition GPUChain.h:85
krnlExec GetGridAutoStep(int32_t stream, GPUDataTypes::RecoStep st=GPUDataTypes::RecoStep::NoRecoStep)
Definition GPUChain.cxx:47
static constexpr int32_t NSECTORS
Definition GPUChain.h:58
void TransferMemoryResourceLinkToHost(RecoStep step, int16_t res, int32_t stream=-1, deviceEvent *ev=nullptr, deviceEvent *evList=nullptr, int32_t nEvents=1)
Definition GPUChain.h:125
void TransferMemoryResourcesToHost(RecoStep step, GPUProcessor *proc, int32_t stream=-1, bool all=false)
Definition GPUChain.h:123
krnlExec GetGrid(uint32_t totalItems, uint32_t nThreads, int32_t stream, GPUReconstruction::krnlDeviceType d=GPUReconstruction::krnlDeviceType::Auto, GPUDataTypes::RecoStep st=GPUDataTypes::RecoStep::NoRecoStep)
Definition GPUChain.cxx:21
krnlExec GetGridBlk(uint32_t nBlocks, int32_t stream, GPUReconstruction::krnlDeviceType d=GPUReconstruction::krnlDeviceType::Auto, GPUDataTypes::RecoStep st=GPUDataTypes::RecoStep::NoRecoStep)
Definition GPUChain.cxx:32
GPUReconstruction * rec()
Definition GPUChain.h:66
HighResTimer & getGeneralStepTimer(GeneralStep step)
void runParallelOuterLoop(bool doGPU, uint32_t nThreads, std::function< void(uint32_t)> lambda)
const GPUDefParameters & getGPUParameters(bool doGPU) const override
void AllocateRegisteredForeignMemory(int16_t res, GPUReconstruction *rec, GPUOutputControl *control=nullptr)
void ComputeReuseMax(GPUProcessor *proc)
RecoStepField GetRecoStepsGPU() const
void PopNonPersistentMemory(RecoStep step, uint64_t tag, const GPUProcessor *proc=nullptr)
const GPUParam & GetParam() const
void PushNonPersistentMemory(uint64_t tag)
InOutTypeField GetRecoStepsOutputs() const
GPUMemorySizeScalers * MemoryScalers()
static void setGlobalOffsetsAndAllocate(GPUTPCClusterFinder &, GPUTPCLinearLabels &)
void SetMaxData(const GPUTrackingInOutPointers &io)
void SetNMaxDigits(size_t nDigits, size_t nPages, size_t nDigitsFragment, size_t nDigitsEndpointMax)
void DumpSuppressedPeaks(std::ostream &out)
void DumpPeakMap(std::ostream &out, std::string_view)
o2::dataformats::ConstMCTruthContainerView< o2::MCCompLabel > const * mPinputLabels
void DumpChargeMap(std::ostream &out, std::string_view)
uint32_t getNSteps(size_t items) const
void DumpSuppressedPeaksCompacted(std::ostream &out)
void DumpPeaksCompacted(std::ostream &out)
tpc::ClusterNative * mPclusterByRow
void init(const GPUSettingsProcessingNNclusterizer &, bool=false)
void initClusterizer(const GPUSettingsProcessingNNclusterizer &, GPUTPCNNClusterizer &, int32_t=-1, int32_t=-1)
OrtDataType::Float16_t * mInputData_16
OrtDataType::Float16_t * mOutputDataReg2_16
OrtDataType::Float16_t * mModelProbabilities_16
OrtDataType::Float16_t * mOutputDataReg1_16
void release(bool=false)
void setIntraOpNumThreads(int threads)
std::vector< std::vector< int64_t > > getNumOutputNodes() const
#define TPC_PADS_IN_SECTOR
GLint GLenum GLint x
Definition glcorearb.h:403
const GLfloat * m
Definition glcorearb.h:4066
GLenum src
Definition glcorearb.h:1767
GLint GLsizei count
Definition glcorearb.h:399
GLuint buffer
Definition glcorearb.h:655
GLsizeiptr size
Definition glcorearb.h:659
GLdouble f
Definition glcorearb.h:310
GLboolean * data
Definition glcorearb.h:298
GLenum GLfloat param
Definition glcorearb.h:271
uint8_t itsSharedClusterMap uint8_t
constexpr int LHCMaxBunches
Definition of a container to keep/associate and arbitrary number of labels associated to an index wit...
RAWDataHeaderV7 RAWDataHeader
const float k2
Definition MathUtils.h:72
void dumpBuffer(gsl::span< const std::byte > buffer, std::ostream &out=std::cout, size_t maxbytes=std::numeric_limits< size_t >::max())
Definition DumpBuffer.h:139
constexpr int LHCBCPERTIMEBIN
Definition Constants.h:38
constexpr int MAXGLOBALPADROW
Definition Constants.h:34
Global TPC definitions and constants.
Definition SimTraits.h:168
@ ZSVersionDenseLinkBased
@ ZSVersionLinkBasedWithMeta
@ ZSVersionRowBased10BitADC
@ ZSVersionRowBased12BitADC
a couple of static helper functions to create timestamp values for CCDB queries or override obsolete ...
constexpr T qStr2Tag(const char *str)
Definition strtag.h:22
tpccf::TPCTime start
Definition CfFragment.h:31
std::unique_ptr< o2::dataformats::ConstMCTruthContainerView< o2::MCCompLabel > > clusterNativeMCView
std::unique_ptr< o2::dataformats::ConstMCTruthContainer< o2::MCCompLabel > > clusterNativeMCBuffer
deviceEvent stream[GPUCA_MAX_STREAMS]
GPUTPCClusterFinder tpcClusterer[GPUCA_NSECTORS]
GPUTrackingInOutPointers ioPtrs
size_t NTPCClusters(size_t tpcDigits, bool perSector=false)
std::function< void *(size_t)> allocator
struct o2::gpu::GPUTPCClusterFinder::Memory::counters_t counters
std::vector< o2::MCCompLabel > data
std::vector< o2::dataformats::MCTruthHeaderElement > header
const GPUTPCDigitsMCInput * tpcDigitsMC
const o2::tpc::ClusterNativeAccess * clustersNative
const GPUSettingsTF * settingsTF
const GPUTrackingInOutZS * tpcZS
const GPUTrackingInOutDigits * tpcPackedDigits
GPUTrackingInOutZSSector sector[NSECTORS]
static constexpr uint32_t NENDPOINTS
size_t getIndex(const GPUOutputControl &v)
static constexpr int getVersion()
get numeric version of the RDH
Definition RDHUtils.h:60
unsigned int nClusters[constants::MAXSECTOR][constants::MAXGLOBALPADROW]
const o2::dataformats::ConstMCTruthContainerView< o2::MCCompLabel > * clustersMCTruth
std::pair< ConstMCLabelContainer, ConstMCLabelContainerView > ConstMCLabelContainerViewWithBuffer
unsigned int clusterOffset[constants::MAXSECTOR][constants::MAXGLOBALPADROW]
const ClusterNative * clustersLinear
static constexpr unsigned int TRIGGER_WORD_SIZE
unsigned char version
static constexpr size_t TPC_ZS_PAGE_SIZE
unsigned short nADCsamples
Trigger info including the orbit.
uint32_t orbit
orbit of the trigger word
TriggerWordDLBZS triggerWord
trigger Word information
bool isValid(int entry=0) const
constexpr size_t min
constexpr size_t max
LOG(info)<< "Compressed in "<< sw.CpuTime()<< " s"
std::vector< Digit > digits